From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44908) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCE-0001zn-M7 for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7dC8-0000uq-5t for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:10 -0400 Received: from cantor2.suse.de ([195.135.220.15]:54157 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dC7-0000tS-TD for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:04 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 02:39:51 +0100 Message-Id: <1331689198-11076-1-git-send-email-afaerber@suse.de> In-Reply-To: <1330893156-26569-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guan Xue-tao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Anthony Liguori Hello, Based on qom-cpu v4 and object_class_get_list() v2, this series converts the UniCore32 CPU to QOM. Code-wise, target-unicore32 is pretty close to target-arm and faces a similar issue of CPU-dependent init code, so let's tackle it next. Patch 1 adds a UniCore32 CPU guest core (TCG) section to MAINTAINERS, so that the target-unicore32 author gets notified of patches against his = code. Patch 2, based on feedback from Guan Xuetao, changes the license of most target-unicore32 files from GPLv2 to GPLv2+. Anthony had contributed a qemu_malloc() -> g_malloc() substitution that he can't relicense at this = time, so leave that as GPLv2 and declare my following patches explicitly as GPL= v2+. Patch 2 embeds CPUUniCore32State into UniCore32CPU. My new cpu-qom.h head= er can be GPLv2+, but into cpu.c we're moving helper.c code so make it GPLv2= for now. Patches 4-7 move code out of the uc32_cpu_init() function and into classe= s. Regards, Andreas Cc: Guan Xue-tao Cc: Anthony Liguori Changes from former repo.or.cz qom-cpu[-wip] branch: * Drop duplicate .instance_init. Andreas F=C3=A4rber (7): MAINTAINERS: Add entry for UniCore32 target-unicore32: Relicense to GPLv2+ target-unicore32: QOM'ify CPU target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass target-unicore32: Store cp0 c1_sys in UniCore32CPUClass target-unicore32: Store feature flags in UniCore32CPUClass target-unicore32: Store ucf64 fpscr in UniCore32CPUClass MAINTAINERS | 5 ++ Makefile.target | 1 + target-unicore32/cpu-qom.h | 81 ++++++++++++++++++++++++++++++ target-unicore32/cpu.c | 112 ++++++++++++++++++++++++++++++++++++= ++++++ target-unicore32/cpu.h | 10 +--- target-unicore32/helper.c | 62 ++--------------------- target-unicore32/helper.h | 5 +- target-unicore32/op_helper.c | 5 +- target-unicore32/translate.c | 5 +- 9 files changed, 213 insertions(+), 73 deletions(-) create mode 100644 target-unicore32/cpu-qom.h create mode 100644 target-unicore32/cpu.c --=20 1.7.7