From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44902) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCD-0001zT-Hm for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7dC9-0000xn-Nz for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:09 -0400 Received: from cantor2.suse.de ([195.135.220.15]:54169 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dC9-0000vr-Ed for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:05 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 02:39:55 +0100 Message-Id: <1331689198-11076-5-git-send-email-afaerber@suse.de> In-Reply-To: <1331689198-11076-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331689198-11076-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 4/7] target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= Contributed under GPLv2+. Signed-off-by: Andreas F=C3=A4rber --- target-unicore32/cpu-qom.h | 1 + target-unicore32/cpu.c | 4 ++++ target-unicore32/helper.c | 1 - 3 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h index afe47e8..f3592d0 100644 --- a/target-unicore32/cpu-qom.h +++ b/target-unicore32/cpu-qom.h @@ -44,6 +44,7 @@ typedef struct UniCore32CPUClass { =20 struct { uint32_t c0_cpuid; + uint32_t c0_cachetype; } cp0; } UniCore32CPUClass; =20 diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index b89a1c6..c17b880 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -17,12 +17,14 @@ typedef struct UniCore32CPUInfo { const char *name; uint32_t cp0_c0_cpuid; + uint32_t cp0_c0_cachetype; } UniCore32CPUInfo; =20 static const UniCore32CPUInfo uc32_cpus[] =3D { { .name =3D "UniCore-II", .cp0_c0_cpuid =3D 0x40010863, + .cp0_c0_cachetype =3D 0x1dd20d2, }, { .name =3D "any", @@ -40,6 +42,7 @@ static void uc32_cpu_initfn(Object *obj) cpu_exec_init(env); env->cpu_model_str =3D object_get_typename(obj); env->cp0.c0_cpuid =3D klass->cp0.c0_cpuid; + env->cp0.c0_cachetype =3D klass->cp0.c0_cachetype; =20 env->uncached_asr =3D ASR_MODE_USER; env->regs[31] =3D 0; @@ -53,6 +56,7 @@ static void uc32_cpu_class_init(ObjectClass *klass, voi= d *data) const UniCore32CPUInfo *info =3D data; =20 k->cp0.c0_cpuid =3D info->cp0_c0_cpuid; + k->cp0.c0_cachetype =3D info->cp0_c0_cachetype; } =20 static void uc32_register_cpu(const UniCore32CPUInfo *info) diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index 44b7842..5e5e34d 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -35,7 +35,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model) set_feature(env, UC32_HWCAP_CMOV); set_feature(env, UC32_HWCAP_UCF64); env->ucf64.xregs[UC32_UCF64_FPSCR] =3D 0; - env->cp0.c0_cachetype =3D 0x1dd20d2; env->cp0.c1_sys =3D 0x00090078; break; case UC32_CPUID_ANY: /* For userspace emulation. */ --=20 1.7.7