From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45050) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCW-0002hp-0V for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7dCB-0000yl-75 for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:27 -0400 Received: from cantor2.suse.de ([195.135.220.15]:54180 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCA-0000xx-Ty for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:07 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 02:39:58 +0100 Message-Id: <1331689198-11076-8-git-send-email-afaerber@suse.de> In-Reply-To: <1331689198-11076-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331689198-11076-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 7/7] target-unicore32: Store ucf64 fpscr in UniCore32CPUClass List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= This removes the remaining CPUID dependency. Contributed under GPLv2+. Signed-off-by: Andreas F=C3=A4rber --- target-unicore32/cpu-qom.h | 4 ++++ target-unicore32/cpu.c | 4 ++++ target-unicore32/cpu.h | 4 ---- target-unicore32/helper.c | 12 ------------ 4 files changed, 8 insertions(+), 16 deletions(-) diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h index c8178a5..594df73 100644 --- a/target-unicore32/cpu-qom.h +++ b/target-unicore32/cpu-qom.h @@ -49,6 +49,10 @@ typedef struct UniCore32CPUClass { uint32_t c1_sys; } cp0; =20 + struct { + uint32_t fpscr; + } ucf64; + uint32_t features; } UniCore32CPUClass; =20 diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index d4b47d6..6966186 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -19,6 +19,7 @@ typedef struct UniCore32CPUInfo { uint32_t cp0_c0_cpuid; uint32_t cp0_c0_cachetype; uint32_t cp0_c1_sys; + uint32_t ucf64_fpscr; uint32_t features; } UniCore32CPUInfo; =20 @@ -30,6 +31,7 @@ static const UniCore32CPUInfo uc32_cpus[] =3D { .cp0_c0_cpuid =3D 0x40010863, .cp0_c0_cachetype =3D 0x1dd20d2, .cp0_c1_sys =3D 0x00090078, + .ucf64_fpscr =3D 0, .features =3D UC32_FEATURE(UC32_HWCAP_CMOV) | UC32_FEATURE(UC32_HWCAP_UCF64), }, @@ -53,6 +55,7 @@ static void uc32_cpu_initfn(Object *obj) env->cp0.c0_cpuid =3D klass->cp0.c0_cpuid; env->cp0.c0_cachetype =3D klass->cp0.c0_cachetype; env->cp0.c1_sys =3D klass->cp0.c1_sys; + env->ucf64.xregs[UC32_UCF64_FPSCR] =3D klass->ucf64.fpscr; env->features =3D klass->features; =20 env->uncached_asr =3D ASR_MODE_USER; @@ -69,6 +72,7 @@ static void uc32_cpu_class_init(ObjectClass *klass, voi= d *data) k->cp0.c0_cpuid =3D info->cp0_c0_cpuid; k->cp0.c0_cachetype =3D info->cp0_c0_cachetype; k->cp0.c1_sys =3D info->cp0_c1_sys; + k->ucf64.fpscr =3D info->ucf64_fpscr; k->features =3D info->features; } =20 diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 1ddd272..81d9e54 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -118,10 +118,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_u= long val, target_ulong mask) #define UC32_HWCAP_CMOV 4 /* 1 << 2 */ #define UC32_HWCAP_UCF64 8 /* 1 << 3 */ =20 -#define UC32_CPUID(env) (env->cp0.c0_cpuid) -#define UC32_CPUID_UCV2 0x40010863 -#define UC32_CPUID_ANY 0xffffffff - #define cpu_init uc32_cpu_init #define cpu_exec uc32_cpu_exec #define cpu_signal_handler uc32_cpu_signal_handler diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index fb6713c..39ab488 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -15,7 +15,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model) { UniCore32CPU *cpu; CPUUniCore32State *env; - uint32_t id; static int inited =3D 1; =20 if (object_class_by_name(cpu_model) =3D=3D NULL) { @@ -24,17 +23,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model= ) cpu =3D UNICORE32_CPU(object_new(cpu_model)); env =3D &cpu->env; =20 - id =3D env->cp0.c0_cpuid; - switch (id) { - case UC32_CPUID_UCV2: - env->ucf64.xregs[UC32_UCF64_FPSCR] =3D 0; - break; - case UC32_CPUID_ANY: /* For userspace emulation. */ - break; - default: - cpu_abort(env, "Bad CPU ID: %x\n", id); - } - if (inited) { inited =3D 0; uc32_translate_init(); --=20 1.7.7