From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38947) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7qea-0004kl-82 for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:02:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7qe5-0002BU-Eo for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:02:19 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44471 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7qe5-0002Aj-5C for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:01:49 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 17:01:32 +0100 Message-Id: <1331740900-5637-5-git-send-email-afaerber@suse.de> In-Reply-To: <1331740900-5637-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331740900-5637-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 04/12] target-sh4: Make cpu_sh4_invalidate_tlb() take SuperHCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Change argument type from CPUSH4State to SuperHCPU. This simplifies the SH7750 SoC as its only caller. Signed-off-by: Andreas F=C3=A4rber --- hw/sh7750.c | 2 +- target-sh4/cpu.h | 4 +++- target-sh4/helper.c | 8 ++++---- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/sh7750.c b/hw/sh7750.c index 23950aa..ca7839e 100644 --- a/hw/sh7750.c +++ b/hw/sh7750.c @@ -406,7 +406,7 @@ static void sh7750_mem_writel(void *opaque, target_ph= ys_addr_t addr, return; case SH7750_MMUCR_A7: if (mem_value & MMUCR_TI) { - cpu_sh4_invalidate_tlb(&s->cpu->env); + cpu_sh4_invalidate_tlb(s->cpu); } s->cpu->env.mmucr =3D mem_value & ~MMUCR_TI; return; diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index ee8ba5e..32e59e7 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -186,6 +186,8 @@ typedef struct CPUSH4State { memory_content **movcal_backup_tail; } CPUSH4State; =20 +typedef struct SuperHCPU SuperHCPU; + CPUSH4State *cpu_sh4_init(const char *cpu_model); int cpu_sh4_exec(CPUSH4State * s); int cpu_sh4_signal_handler(int host_signum, void *pinfo, @@ -197,7 +199,7 @@ void do_interrupt(CPUSH4State * env); =20 void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); #if !defined(CONFIG_USER_ONLY) -void cpu_sh4_invalidate_tlb(CPUSH4State *s); +void cpu_sh4_invalidate_tlb(SuperHCPU *cpu); uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr); void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t a= ddr, diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 5c57380..655faaa 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -555,22 +555,22 @@ void cpu_load_tlb(CPUSH4State * env) entry->tc =3D (uint8_t)cpu_ptea_tc(env->ptea); } =20 - void cpu_sh4_invalidate_tlb(CPUSH4State *s) +void cpu_sh4_invalidate_tlb(SuperHCPU *cpu) { int i; =20 /* UTLB */ for (i =3D 0; i < UTLB_SIZE; i++) { - tlb_t * entry =3D &s->utlb[i]; + tlb_t *entry =3D &cpu->env.utlb[i]; entry->v =3D 0; } /* ITLB */ for (i =3D 0; i < ITLB_SIZE; i++) { - tlb_t * entry =3D &s->itlb[i]; + tlb_t *entry =3D &cpu->env.itlb[i]; entry->v =3D 0; } =20 - tlb_flush(s, 1); + tlb_flush(&cpu->env, 1); } =20 uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, --=20 1.7.7