From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38957) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7qeb-0004nl-4e for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:02:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7qe6-0002CT-Oi for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:02:20 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44481 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7qe6-0002Bh-Eh for qemu-devel@nongnu.org; Wed, 14 Mar 2012 12:01:50 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 17:01:36 +0100 Message-Id: <1331740900-5637-9-git-send-email-afaerber@suse.de> In-Reply-To: <1331740900-5637-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331740900-5637-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 08/12] target-sh4: Make get_{physical, mmu}_address() take SuperHCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Simplifies TLB helper code. Signed-off-by: Andreas F=C3=A4rber --- target-sh4/helper.c | 49 +++++++++++++++++++++++++--------------------= ---- 1 files changed, 25 insertions(+), 24 deletions(-) diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 3653ece..d273097 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -338,30 +338,32 @@ static int find_utlb_entry(SuperHCPU *cpu, target_u= long address, int use_asid) MMU_ITLB_MULTIPLE, MMU_ITLB_VIOLATION, MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE. */ -static int get_mmu_address(CPUSH4State * env, target_ulong * physical, - int *prot, target_ulong address, - int rw, int access_type) +static int get_mmu_address(SuperHCPU *cpu, target_ulong *physical, + int *prot, target_ulong address, + int rw, int access_type) { int use_asid, n; tlb_t *matching =3D NULL; =20 - use_asid =3D (env->mmucr & MMUCR_SV) =3D=3D 0 || (env->sr & SR_MD) =3D= =3D 0; + use_asid =3D (cpu->env.mmucr & MMUCR_SV) =3D=3D 0 || + (cpu->env.sr & SR_MD) =3D=3D 0; =20 if (rw =3D=3D 2) { - n =3D find_itlb_entry(sh_env_get_cpu(env), address, use_asid); + n =3D find_itlb_entry(cpu, address, use_asid); if (n >=3D 0) { - matching =3D &env->itlb[n]; - if (!(env->sr & SR_MD) && !(matching->pr & 2)) + matching =3D &cpu->env.itlb[n]; + if (!(cpu->env.sr & SR_MD) && !(matching->pr & 2)) { n =3D MMU_ITLB_VIOLATION; - else + } else { *prot =3D PAGE_EXEC; + } } else { - n =3D find_utlb_entry(sh_env_get_cpu(env), address, use_asid= ); + n =3D find_utlb_entry(cpu, address, use_asid); if (n >=3D 0) { - n =3D copy_utlb_entry_itlb(env, n); - matching =3D &env->itlb[n]; - if (!(env->sr & SR_MD) && !(matching->pr & 2)) { - n =3D MMU_ITLB_VIOLATION; + n =3D copy_utlb_entry_itlb(&cpu->env, n); + matching =3D &cpu->env.itlb[n]; + if (!(cpu->env.sr & SR_MD) && !(matching->pr & 2)) { + n =3D MMU_ITLB_VIOLATION; } else { *prot =3D PAGE_READ | PAGE_EXEC; if ((matching->pr & 1) && matching->d) { @@ -375,10 +377,10 @@ static int get_mmu_address(CPUSH4State * env, targe= t_ulong * physical, } } } else { - n =3D find_utlb_entry(sh_env_get_cpu(env), address, use_asid); + n =3D find_utlb_entry(cpu, address, use_asid); if (n >=3D 0) { - matching =3D &env->utlb[n]; - if (!(env->sr & SR_MD) && !(matching->pr & 2)) { + matching =3D &cpu->env.utlb[n]; + if (!(cpu->env.sr & SR_MD) && !(matching->pr & 2)) { n =3D (rw =3D=3D 1) ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ; } else if ((rw =3D=3D 1) && !(matching->pr & 1)) { @@ -404,14 +406,14 @@ static int get_mmu_address(CPUSH4State * env, targe= t_ulong * physical, return n; } =20 -static int get_physical_address(CPUSH4State * env, target_ulong * physic= al, +static int get_physical_address(SuperHCPU *cpu, target_ulong *physical, int *prot, target_ulong address, int rw, int access_type) { /* P1, P2 and P4 areas do not use translation */ if ((address >=3D 0x80000000 && address < 0xc0000000) || address >=3D 0xe0000000) { - if (!(env->sr & SR_MD) + if (!(cpu->env.sr & SR_MD) && (address < 0xe0000000 || address >=3D 0xe4000000)) { /* Unauthorized access in user mode (only store queues are availabl= e) */ fprintf(stderr, "Unauthorized access\n"); @@ -433,14 +435,14 @@ static int get_physical_address(CPUSH4State * env, = target_ulong * physical, } =20 /* If MMU is disabled, return the corresponding physical page */ - if (!(env->mmucr & MMUCR_AT)) { + if (!(cpu->env.mmucr & MMUCR_AT)) { *physical =3D address & 0x1FFFFFFF; *prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; return MMU_OK; } =20 /* We need to resort to the MMU */ - return get_mmu_address(env, physical, prot, address, rw, access_type= ); + return get_mmu_address(cpu, physical, prot, address, rw, access_type= ); } =20 int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, in= t rw, @@ -450,9 +452,8 @@ int cpu_sh4_handle_mmu_fault(CPUSH4State * env, targe= t_ulong address, int rw, int prot, ret, access_type; =20 access_type =3D ACCESS_INT; - ret =3D - get_physical_address(env, &physical, &prot, address, rw, - access_type); + ret =3D get_physical_address(sh_env_get_cpu(env), &physical, &prot, = address, + rw, access_type); =20 if (ret !=3D MMU_OK) { env->tea =3D address; @@ -509,7 +510,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUSH4Stat= e * env, target_ulong addr) target_ulong physical; int prot; =20 - get_physical_address(env, &physical, &prot, addr, 0, 0); + get_physical_address(sh_env_get_cpu(env), &physical, &prot, addr, 0,= 0); return physical; } =20 --=20 1.7.7