All of lore.kernel.org
 help / color / mirror / Atom feed
From: Eugeni Dodonov <eugeni.dodonov@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: [PATCH 02/41] drm/i915: add Haswell devices and their PCI IDs
Date: Thu, 29 Mar 2012 12:32:18 -0300	[thread overview]
Message-ID: <1333035177-19607-3-git-send-email-eugeni.dodonov@intel.com> (raw)
In-Reply-To: <1333035177-19607-1-git-send-email-eugeni.dodonov@intel.com>

This adds product definitions for desktop, mobile and server boards.

v2: split into a separate patch, add .has_pch_split feature.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
 drivers/char/agp/intel-agp.h    |   11 +++++++++++
 drivers/char/agp/intel-gtt.c    |   14 ++++++++++++++
 drivers/gpu/drm/i915/i915_drv.c |   18 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h |    2 ++
 4 files changed, 45 insertions(+)

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 5da67f1..46394c11 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -234,6 +234,17 @@
 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG		0x0166
 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB		0x0158  /* Server */
 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG		0x015A
+#define PCI_DEVICE_ID_INTEL_HASWELL_HB				0x0400 /* Desktop */
+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG		0x0402
+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG		0x0412
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB			0x0404 /* Mobile */
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG		0x0406
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG		0x0416
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB			0x0408 /* Server */
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG		0x040a
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG		0x041a
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */
+#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04
 
 int intel_gmch_probe(struct pci_dev *pdev,
 			       struct agp_bridge_data *bridge);
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 5cf47ac..f494556 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1459,6 +1459,20 @@ static const struct intel_gtt_driver_description {
 	    "Ivybridge", &sandybridge_gtt_driver },
 	{ PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG,
 	    "Ivybridge", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
+	    "Haswell", &sandybridge_gtt_driver },
+	{ PCI_DEVICE_ID_INTEL_HASWELL_SDV,
+	    "Haswell", &sandybridge_gtt_driver },
 	{ 0, NULL, NULL }
 };
 
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9cf66e1..6e4d90c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -260,6 +260,24 @@ static const struct intel_device_info intel_ivybridge_m_info = {
 	.has_pch_split = 1,
 };
 
+static const struct intel_device_info intel_haswell_d_info = {
+	.is_haswell = 1, .gen = 7,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.has_bsd_ring = 1,
+	.has_blt_ring = 1,
+	.has_llc = 1,
+	.has_pch_split = 1,
+};
+
+static const struct intel_device_info intel_haswell_m_info = {
+	.is_haswell = 1, .gen = 7, .is_mobile = 1,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.has_bsd_ring = 1,
+	.has_blt_ring = 1,
+	.has_llc = 1,
+	.has_pch_split = 1,
+};
+
 static const struct pci_device_id pciidlist[] = {		/* aka */
 	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */
 	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0443f2d..90681d6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -256,6 +256,7 @@ struct intel_device_info {
 	u8 is_crestline:1;
 	u8 is_ivybridge:1;
 	u8 has_pch_split:1;
+	u8 is_haswell:1;
 	u8 has_fbc:1;
 	u8 has_pipe_cxsr:1;
 	u8 has_hotplug:1;
@@ -1006,6 +1007,7 @@ struct drm_i915_file_private {
 #define IS_IRONLAKE_D(dev)	((dev)->pci_device == 0x0042)
 #define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
 #define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)->is_ivybridge)
+#define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)
 #define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
 
 /*
-- 
1.7.9.5

  parent reply	other threads:[~2012-03-29 15:32 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-29 15:32 [PATCH 00/41] [RFC] Haswell v2 Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 01/41] drm/i915: transform HAS_PCH_SPLIT in a feature check Eugeni Dodonov
2012-03-29 15:32 ` Eugeni Dodonov [this message]
2012-03-29 15:32 ` [PATCH 03/41] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 04/41] drm/i915: add support for LynxPoint PCH Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 05/41] drm/i915: add support for power wells Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 06/41] drm/i915: add enumeration for DDI ports Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 07/41] drm/i915: add DDI registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 08/41] drm/i915: add DP_TP_CTL registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 09/41] drm/i915: add DP_TP_STATUS registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 10/41] drm/i915: add definitions for DDI_BUF_CTL registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 11/41] drm/i915: add definition of DDI buffer translations regs Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 12/41] drm/i915: add definition of LPT FDI port width registers Eugeni Dodonov
2012-03-29 20:25   ` Daniel Vetter
2012-03-29 15:32 ` [PATCH 13/41] drm/i915: add SBI registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 14/41] drm/i915: add support for SBI ops Eugeni Dodonov
2012-03-29 20:27   ` Daniel Vetter
2012-03-29 15:32 ` [PATCH 15/41] drm/i915: add PIXCLK_GATE register Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 16/41] drm/i915: add S PLL control Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 17/41] drm/i915: add port clock selection support for HSW Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 18/41] drm/i915: add SSC offsets for SBI access Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 19/41] drm/i915: add LCPLL control registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 20/41] drm/i915: add WRPLL clocks Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 21/41] drm/i915: add WM_LINETIME registers Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 22/41] drm/i915: add SFUSE_STRAP registers for digital port detection Eugeni Dodonov
2012-03-29 20:35   ` Daniel Vetter
2012-03-29 15:32 ` [PATCH 23/41] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 24/41] drm/i915: share forcewaking code between IVB and HSW Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 25/41] drm/i915: haswell has 3 pipes as well Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 26/41] drm/i915: reuse Ivybridge interrupts code for Haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 27/41] drm/i915: share pipe count handling with Ivybridge Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 28/41] drm/i915: share IVB cursor routine with Haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 29/41] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 30/41] drm/i915: enable power wells on haswell init Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 31/41] drm/i915: disable rc6 on haswell for now Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 32/41] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 33/41] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 34/41] drm/i915: perform Haswell DDI link training in FDI mode Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 35/41] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 36/41] drm/i915: do not use fdi_normal_train on haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 37/41] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 38/41] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 39/41] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 40/41] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-03-29 15:32 ` [PATCH 41/41] drm/i915: add debugging bits for haswell modesetting Eugeni Dodonov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1333035177-19607-3-git-send-email-eugeni.dodonov@intel.com \
    --to=eugeni.dodonov@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.