From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell Date: Fri, 13 Apr 2012 17:08:51 -0300 Message-ID: <1334347745-11743-16-git-send-email-eugeni.dodonov@intel.com> References: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy6-pub.bluehost.com (oproxy6-pub.bluehost.com [67.222.54.6]) by gabe.freedesktop.org (Postfix) with SMTP id 92208A0E29 for ; Fri, 13 Apr 2012 13:35:32 -0700 (PDT) In-Reply-To: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org Signed-off-by: Eugeni Dodonov --- drivers/gpu/drm/i915/intel_display.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0768f48..e4ebd39 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1437,8 +1437,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, /* PCH only available on ILK+ */ BUG_ON(dev_priv->info->gen < 5); - /* Make sure PCH DPLL is enabled */ - assert_pch_pll_enabled(dev_priv, pipe); + /* Make sure PCH DPLL is enabled on Pre-Haswell platforms */ + if (!IS_HASWELL(dev_priv->dev)) + assert_pch_pll_enabled(dev_priv, pipe); /* FDI must be feeding us bits for PCH ports */ assert_fdi_tx_enabled(dev_priv, pipe); -- 1.7.10