From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 06/29] drm/i915: add support for SBI ops Date: Fri, 13 Apr 2012 21:26:30 +0100 Message-ID: <1334348797_415329@CP5-2952> References: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com> <1334347745-11743-7-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 39DE49E7EB for ; Fri, 13 Apr 2012 13:26:46 -0700 (PDT) In-Reply-To: <1334347745-11743-7-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org On Fri, 13 Apr 2012 17:08:42 -0300, Eugeni Dodonov wrote: > With Lynx Point, we need to use SBI to communicate with the display clock > control. This commit adds helper functions to access the registers via > SBI. > > v2: de-inline the function and address changes in bits names > > v3: protect operations with dpio_lock, increase timeout to 100 for > paranoia sake. > > v1 Reviewed-by: Rodrigo Vivi Hmm, busy-waits upon a register change. Does it have to be atomic? Can it really be called in IRQ context? Can I have a sleepy version that won't cause audible stutters for the normal case? (Admittedly single-core processors are history...) -Chris -- Chris Wilson, Intel Open Source Technology Centre