From mboxrd@z Thu Jan 1 00:00:00 1970 From: Seung-Woo Kim Subject: [PATCH 1/5] drm/exynos: fixed wrong pageflip finish event for interlace mode Date: Tue, 24 Apr 2012 19:47:50 +0900 Message-ID: <1335264474-3292-2-git-send-email-sw0312.kim@samsung.com> References: <1335264474-3292-1-git-send-email-sw0312.kim@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by gabe.freedesktop.org (Postfix) with ESMTP id D50269E83C for ; Tue, 24 Apr 2012 03:47:58 -0700 (PDT) Received: from epcpsbgm1.samsung.com (mailout3.samsung.com [203.254.224.33]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M2Z00I1CCNOGBD0@mailout3.samsung.com> for dri-devel@lists.freedesktop.org; Tue, 24 Apr 2012 19:47:56 +0900 (KST) Received: from localhost.localdomain ([165.213.219.121]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M2Z00KRICNT8S30@mmp1.samsung.com> for dri-devel@lists.freedesktop.org; Tue, 24 Apr 2012 19:47:56 +0900 (KST) In-reply-to: <1335264474-3292-1-git-send-email-sw0312.kim@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org, airlied@linux.ie Cc: inki.dae@samsung.com, kyungmin.park@samsung.com, sw0312.kim@samsung.com List-Id: dri-devel@lists.freedesktop.org Pageflip finish event for interlace mode has bug on checking top field vsync because of comparing between dma address converted by start coordinates and non-converted dma address. Signed-off-by: Seung-Woo Kim Signed-off-by: Kyungmin Park --- drivers/gpu/drm/exynos/exynos_mixer.c | 12 +++++++----- 1 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 2f6727a..3bc01a6 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -886,7 +886,7 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg; struct mixer_context *ctx = drm_hdmi_ctx->ctx; struct mixer_resources *res = &ctx->mixer_res; - u32 val, val_base; + u32 val, base, shadow; spin_lock(&res->reg_slock); @@ -897,12 +897,14 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) if (val & MXR_INT_STATUS_VSYNC) { /* interlace scan need to check shadow register */ if (ctx->interlace) { - val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0)); - if (ctx->win_data[0].dma_addr != val_base) + base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0)); + shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0)); + if (base != shadow) goto out; - val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1)); - if (ctx->win_data[1].dma_addr != val_base) + base = mixer_reg_read(res, MXR_GRAPHIC_BASE(1)); + shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1)); + if (base != shadow) goto out; } -- 1.7.4.1