From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: [PATCH 06/12] drm/i915: Remove gen3 irq code from gen4 irq routine Date: Tue, 24 Apr 2012 22:59:46 +0100 Message-ID: <1335304792-17636-6-git-send-email-chris@chris-wilson.co.uk> References: <1335304792-17636-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 9130BA0B98 for ; Tue, 24 Apr 2012 15:01:02 -0700 (PDT) In-Reply-To: <1335304792-17636-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org And a couple of miscellaneous cleanups to the main body of the IRQ loop; move per-loop condition variables within the scope of the loop and move the old DRI1 breadcrumb to the tail of the function and so only execute it once. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2adc27a..2e84020 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2651,23 +2651,17 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS) struct drm_i915_master_private *master_priv; u32 iir, new_iir; u32 pipe_stats[I915_MAX_PIPES]; - u32 vblank_status; - int vblank = 0; unsigned long irqflags; int irq_received; int ret = IRQ_NONE, pipe; - bool blc_event = false; atomic_inc(&dev_priv->irq_received); iir = I915_READ(IIR); - if (INTEL_INFO(dev)->gen >= 4) - vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS; - else - vblank_status = PIPE_VBLANK_INTERRUPT_STATUS; - for (;;) { + bool blc_event = false; + irq_received = iir != 0; /* Can't rely on pipestat interrupt bit in iir as it might @@ -2719,13 +2713,6 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS) I915_WRITE(IIR, iir); new_iir = I915_READ(IIR); /* Flush posted writes */ - if (dev->primary->master) { - master_priv = dev->primary->master->driver_priv; - if (master_priv->sarea_priv) - master_priv->sarea_priv->last_dispatch = - READ_BREADCRUMB(dev_priv); - } - if (iir & I915_USER_INTERRUPT) notify_ring(dev, &dev_priv->ring[RCS]); if (iir & I915_BSD_USER_INTERRUPT) @@ -2738,9 +2725,8 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS) intel_prepare_page_flip(dev, 1); for_each_pipe(pipe) { - if (pipe_stats[pipe] & vblank_status && + if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && drm_handle_vblank(dev, pipe)) { - vblank++; i915_pageflip_stall_check(dev, pipe); intel_finish_page_flip(dev, pipe); } @@ -2771,6 +2757,13 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS) iir = new_iir; } + if (dev->primary->master) { + master_priv = dev->primary->master->driver_priv; + if (master_priv->sarea_priv) + master_priv->sarea_priv->last_dispatch = + READ_BREADCRUMB(dev_priv); + } + return ret; } -- 1.7.10