From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55751) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SRm1h-00027q-5Y for qemu-devel@nongnu.org; Tue, 08 May 2012 11:08:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SRm1f-00076q-Am for qemu-devel@nongnu.org; Tue, 08 May 2012 11:08:32 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:36858) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SRm1f-000738-31 for qemu-devel@nongnu.org; Tue, 08 May 2012 11:08:31 -0400 From: Peter Maydell Date: Tue, 8 May 2012 16:08:19 +0100 Message-Id: <1336489699-10969-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1336489699-10969-1-git-send-email-peter.maydell@linaro.org> References: <1336489699-10969-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: When setting FPSCR.QC, don't clear other FPSCR bits List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org, Anthony Liguori , Paul Brook From: Matt Craighead This patch fixes a bug affecting a variety of Neon instructions, such as VQADD. Signed-off-by: Matt Craighead Signed-off-by: Peter Maydell --- target-arm/neon_helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 1e02d61..e0b9dbf 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -16,7 +16,7 @@ #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) -#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q +#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q #define NEON_TYPE1(name, type) \ typedef struct \ -- 1.7.1