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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Thu, 17 May 2012 07:12:40 +1000
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Subject: Re: [Qemu-devel] [PATCH 13/13] iommu: Add a memory barrier to DMA
 RW function
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To: Anthony Liguori <anthony@codemonkey.ws>
Cc: "Michael S. Tsirkin" <mst@redhat.com>, qemu-devel@nongnu.org, David Gibson <david@gibson.dropbear.id.au>

On Thu, 2012-05-17 at 07:10 +1000, Benjamin Herrenschmidt wrote:

> I have a long experience with dealing with ordering issues on large SMP
> systems and believe me, anything "fine grained" is really really hard to
> generally get right, and the resulting bugs are really nasty to track
> down and even identify. So I have a strong bias toward the big hammer
> approach that is guaranteed to avoid the problem for anything using the
> right DMA accessors.

BTW, this is going to also hurt SMP ARMs ... ARM is getting increasingly
out of order as well.

Cheers,
Ben.