From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758924Ab2EUSix (ORCPT ); Mon, 21 May 2012 14:38:53 -0400 Received: from mga01.intel.com ([192.55.52.88]:2816 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750842Ab2EUSiw (ORCPT ); Mon, 21 May 2012 14:38:52 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="scan'208";a="155288700" Subject: Re: [PATCH 2/3] x86: x2apic/cluster: Make use of lowest priority delivery mode From: Suresh Siddha Reply-To: Suresh Siddha To: Linus Torvalds Cc: Ingo Molnar , Alexander Gordeev , Arjan van de Ven , linux-kernel@vger.kernel.org, x86@kernel.org, Cyrill Gorcunov , Yinghai Lu Date: Mon, 21 May 2012 11:37:14 -0700 In-Reply-To: References: <20120518102640.GB31517@dhcp-26-207.brq.redhat.com> <20120521082240.GA31407@gmail.com> <20120521093648.GC28930@dhcp-26-207.brq.redhat.com> <20120521124025.GC17065@gmail.com> <20120521144812.GD28930@dhcp-26-207.brq.redhat.com> <20120521145904.GA7068@gmail.com> <1337623623.1997.115.camel@sbsiddha-desk.sc.intel.com> Organization: Intel Corp Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1337625434.1997.126.camel@sbsiddha-desk.sc.intel.com> Mime-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2012-05-21 at 11:18 -0700, Linus Torvalds wrote: > On Mon, May 21, 2012 at 11:07 AM, Suresh Siddha > wrote: > > > > All the cluster members of a given x2apic cluster belong to the same > > package. These x2apic cluster id's are setup by the HW and not by the > > SW. And only one cluster (with one or multiple members of that cluster > > set) can be specified in the interrupt destination field of the routing > > table entry. > > Ok, then the main question ends up being if there are enough cache or > power domains within a cluster to still worry about it. There are 16 members with in a x2apic cluster. With two HT siblings, that will still leave 8-cores. > > For example, you say "package", but that can sometimes mean multiple > dies, or even just split caches that are big enough to matter > (although I can't think of any such right now on the x86 side - Core2 > Duo had huge L2's, but they were shared, not split). Most likely multiple dies or split caches will have different cluster-id's. I don't know of any upcoming implementations that will have such an implementation supporting x2apic, but will keep an eye. > > > Power aware interrupt routing in IVB does this. And the policy of > > whether you want the interrupt to be routed to the busy core (to save > > power) or an idle core (for minimizing the interruptions on the busy > > core) can be selected by the SW (using IA32_ENERGY_PERF_BIAS MSR). > > Sounds like we definitely would want to support this at least in the > IVB timeframe then. > > But I do agree with Ingo that it would be really good to actually see > numbers (and no, I don't mean "look here, now the irq's are nicely > spread out", but power and/or performance numbers showing that it > actually helps something). I agree. This is the reason why I held up posting these patches before. I can come up with micro-benchmarks that can show some difference but the key is to find good workload/benchmark that can show measurable difference. Any suggestions? thanks, suresh