From: Roland Stigge <stigge@antcom.de> To: arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kevin.wells@nxp.com, srinivas.bakki@nxp.com, aletes.xgr@gmail.com Cc: Roland Stigge <stigge@antcom.de> Subject: [PATCH v2 13/23] ARM: LPC32xx: High Speed UART configuration via DT Date: Thu, 14 Jun 2012 18:51:03 +0200 [thread overview] Message-ID: <1339692673-7848-14-git-send-email-stigge@antcom.de> (raw) In-Reply-To: <1339692673-7848-1-git-send-email-stigge@antcom.de> This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the LPC32xx SoC, adjusting the compatible strings, adding interrupts and status configuration. On the PHY3250 reference board, UART2 is enabled. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> --- arch/arm/boot/dts/lpc32xx.dtsi | 16 +++++++++++----- arch/arm/boot/dts/phy3250.dts | 4 ++++ 2 files changed, 15 insertions(+), 5 deletions(-) --- linux-2.6.orig/arch/arm/boot/dts/lpc32xx.dtsi +++ linux-2.6/arch/arm/boot/dts/lpc32xx.dtsi @@ -212,18 +212,24 @@ }; uart1: serial@40014000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40014000 0x1000>; + interrupts = <26 0>; + status = "disabled"; }; uart2: serial@40018000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40018000 0x1000>; + interrupts = <25 0>; + status = "disabled"; }; - uart7: serial@4001C000 { - compatible = "nxp,serial"; - reg = <0x4001C000 0x1000>; + uart7: serial@4001c000 { + compatible = "nxp,lpc3220-hsuart"; + reg = <0x4001c000 0x1000>; + interrupts = <24 0>; + status = "disabled"; }; rtc@40024000 { --- linux-2.6.orig/arch/arm/boot/dts/phy3250.dts +++ linux-2.6/arch/arm/boot/dts/phy3250.dts @@ -148,6 +148,10 @@ }; fab { + uart2: serial@40018000 { + status = "okay"; + }; + tsc@40048000 { status = "okay"; };
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From: stigge@antcom.de (Roland Stigge) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 13/23] ARM: LPC32xx: High Speed UART configuration via DT Date: Thu, 14 Jun 2012 18:51:03 +0200 [thread overview] Message-ID: <1339692673-7848-14-git-send-email-stigge@antcom.de> (raw) In-Reply-To: <1339692673-7848-1-git-send-email-stigge@antcom.de> This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the LPC32xx SoC, adjusting the compatible strings, adding interrupts and status configuration. On the PHY3250 reference board, UART2 is enabled. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> --- arch/arm/boot/dts/lpc32xx.dtsi | 16 +++++++++++----- arch/arm/boot/dts/phy3250.dts | 4 ++++ 2 files changed, 15 insertions(+), 5 deletions(-) --- linux-2.6.orig/arch/arm/boot/dts/lpc32xx.dtsi +++ linux-2.6/arch/arm/boot/dts/lpc32xx.dtsi @@ -212,18 +212,24 @@ }; uart1: serial at 40014000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40014000 0x1000>; + interrupts = <26 0>; + status = "disabled"; }; uart2: serial at 40018000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40018000 0x1000>; + interrupts = <25 0>; + status = "disabled"; }; - uart7: serial at 4001C000 { - compatible = "nxp,serial"; - reg = <0x4001C000 0x1000>; + uart7: serial at 4001c000 { + compatible = "nxp,lpc3220-hsuart"; + reg = <0x4001c000 0x1000>; + interrupts = <24 0>; + status = "disabled"; }; rtc at 40024000 { --- linux-2.6.orig/arch/arm/boot/dts/phy3250.dts +++ linux-2.6/arch/arm/boot/dts/phy3250.dts @@ -148,6 +148,10 @@ }; fab { + uart2: serial at 40018000 { + status = "okay"; + }; + tsc at 40048000 { status = "okay"; };
next prev parent reply other threads:[~2012-06-14 16:51 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-06-14 16:50 [PATCH v2 00/23] ARM: LPC32xx specific updates for next Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 01/23] ARM: LPC32xx: Add NAND flash timing to PHY3250 board dts Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 02/23] ARM: LPC32xx: Clock initialization for NAND controllers Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 03/23] ARM: LPC32xx: Remove SLC controller initialization from platform init Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 04/23] ARM: LPC32xx: Add DMA configuration to platform data Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-07-10 21:36 ` Arnd Bergmann 2012-07-10 21:36 ` Arnd Bergmann 2012-07-11 8:28 ` Roland Stigge 2012-07-11 8:28 ` Roland Stigge 2012-07-11 12:33 ` Arnd Bergmann 2012-07-11 12:33 ` Arnd Bergmann 2012-07-11 12:40 ` Roland Stigge 2012-07-11 12:40 ` Roland Stigge 2012-07-11 13:25 ` Arnd Bergmann 2012-07-11 13:25 ` Arnd Bergmann 2012-07-11 13:39 ` Roland Stigge 2012-07-11 13:39 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 05/23] ARM: LPC32xx: Adjust dtsi file for MLC controller configuration Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 06/23] ARM: LPC32xx: Add dts for EA3250 reference board Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 07/23] ARM: LPC32xx: DTS adjustment for key matrix controller Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 08/23] ARM: LPC32xx: Clock " Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:50 ` [PATCH v2 09/23] ARM: LPC32xx: Defconfig update Roland Stigge 2012-06-14 16:50 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 10/23] ARM: LPC32xx: Add MMC controller support Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 11/23] ARM: LPC32xx: DTS adjustment for using pl18x primecell Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 12/23] ARM: LPC32xx: DT conversion of Standard UARTs Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` Roland Stigge [this message] 2012-06-14 16:51 ` [PATCH v2 13/23] ARM: LPC32xx: High Speed UART configuration via DT Roland Stigge 2012-06-14 16:51 ` [PATCH v2 14/23] ARM: LPC32xx: Remove mach specific ARCH_NR_GPIOS, use default Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 15/23] ARM: LPC32xx: Fix lpc32xx.dtsi status property: "disable" -> "disabled" Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 16/23] ARM: LPC32xx: Build arch dtbs Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 17/23] ARM: LPC32xx: Add dt settings to the at25 node Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 18/23] ARM: LPC32xx: Remove spi chipselect request from board init Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 19/23] ARM: LPC32xx: Remove spi chip definitions Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 20/23] ARM: LPC32xx: Cleanup board init, remove duplicate clock init Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 21/23] ARM: LPC32xx: Move uart6 irda disable to serial.c Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 22/23] ARM: LPC32xx: Move i2s1 dma enabling to clock.c Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-14 16:51 ` [PATCH v2 23/23] ARM: LPC32xx: Remove duplicate usb host clock init Roland Stigge 2012-06-14 16:51 ` Roland Stigge 2012-06-15 12:07 ` [PATCH v2 00/23] ARM: LPC32xx specific updates for next Arnd Bergmann 2012-06-15 12:07 ` Arnd Bergmann 2012-06-15 12:12 ` Alexandre Pereira da Silva 2012-06-15 12:12 ` Alexandre Pereira da Silva 2012-06-15 12:37 ` Roland Stigge 2012-06-15 12:37 ` Roland Stigge
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