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From: Eugeni Dodonov <eugeni.dodonov@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: [PATCH 08/21] drm/i915: simplify FDI RX check for LPT
Date: Thu, 28 Jun 2012 15:55:36 -0300	[thread overview]
Message-ID: <1340909749-15249-9-git-send-email-eugeni.dodonov@intel.com> (raw)
In-Reply-To: <1340909749-15249-1-git-send-email-eugeni.dodonov@intel.com>

On LPT onwards, there is only one FDI receiver, but any pipe can drive it.
For now, we consider that only pipeA can work in CRT mode, so if any other
pipe attempts to enable FDI receiver it is considered invalid behavior.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++++++++----------
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 76508a7..e8fd6cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1128,14 +1128,23 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
 	u32 val;
 	bool cur_state;
 
-	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
-			DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n");
+	/* On LPT, there is only one FDI RX that can be used.  At the same
+	 * time, any pipe can connect to it, but only one at a time.  To
+	 * simplify the enabling, we consider that only pipeA can be used in
+	 * FDI configuration.
+	 */
+	if (HAS_PCH_LPT(dev_priv->dev)) {
+		if (pipe > 0) {
+			DRM_ERROR("Attempting to %s FDI_RX on Haswell pipe > 0\n",
+					(state==true) ? "enable" : "disable");
 			return;
-	} else {
-		reg = FDI_RX_CTL(pipe);
-		val = I915_READ(reg);
-		cur_state = !!(val & FDI_RX_ENABLE);
+		}
 	}
+
+	reg = FDI_RX_CTL(pipe);
+	val = I915_READ(reg);
+	cur_state = !!(val & FDI_RX_ENABLE);
+
 	WARN(cur_state != state,
 	     "FDI RX state assertion failure (expected %s, current %s)\n",
 	     state_string(state), state_string(cur_state));
@@ -1651,6 +1660,17 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
 	/* PCH only available on ILK+ */
 	BUG_ON(dev_priv->info->gen < 5);
 
+	if (HAS_PCH_LPT(dev_priv->dev)) {
+		/* On LPT, there is only one transcoder, but any pipe can be used with it.
+		 * To simplify things, we consider that only pipeA can be used with CRT,
+		 * so we handle this check in the same way as with the FDI receiver.
+		 */
+		if (pipe > 0) {
+			DRM_ERROR("Attempting to enable transcoder on Lynx point with pipe > 0\n");
+			return;
+		}
+	}
+
 	/* Make sure PCH DPLL is enabled */
 	assert_pch_pll_enabled(dev_priv,
 			       to_intel_crtc(crtc)->pch_pll,
@@ -1660,10 +1680,6 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
 	assert_fdi_tx_enabled(dev_priv, pipe);
 	assert_fdi_rx_enabled(dev_priv, pipe);
 
-	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
-		DRM_ERROR("Attempting to enable transcoder on Haswell with pipe > 0\n");
-		return;
-	}
 	reg = TRANSCONF(pipe);
 	val = I915_READ(reg);
 	pipeconf_val = I915_READ(PIPECONF(pipe));
-- 
1.7.11.1

  parent reply	other threads:[~2012-06-28 18:54 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-28 18:55 [PATCH 00/21] More Haswell patches Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 01/21] drm/i915: Move DP structs to shared location Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 02/21] drm/i915: Add support for DDI control DP outputs Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 03/21] drm/i915: Add DP Helper functions for Haswell Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 04/21] drm/i915: Haswell specific code for the DP Link Training Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 05/21] drm/i915: Disable DDI Pipe Control on HSW while disabling pipe Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 06/21] drm/i915: Hook DP init in ddi module Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 07/21] drm/i915: re-initialize DDI buffer translations after resume Eugeni Dodonov
2012-07-04 20:07   ` Paulo Zanoni
2012-07-04 20:35     ` Daniel Vetter
2012-07-04 23:13       ` Eugeni Dodonov
2012-06-28 18:55 ` Eugeni Dodonov [this message]
2012-06-28 18:55 ` [PATCH 09/21] drm/i915: account for only one transcoder on LPT Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 10/21] drm/i915: introduce lpt_enable_pch and cpt_enable_pch Eugeni Dodonov
2012-07-04 18:21   ` Paulo Zanoni
2012-07-06 20:47     ` Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 11/21] drm/i915: program FDI_RX TP and FDI delays Eugeni Dodonov
2012-07-04 21:15   ` Paulo Zanoni
2012-07-04 23:15     ` [PATCH 10/31] " Eugeni Dodonov
2012-07-05 12:58       ` Paulo Zanoni
2012-07-05 13:12         ` Daniel Vetter
2012-06-28 18:55 ` [PATCH 12/21] drm/i915: support Haswell-style force waking Eugeni Dodonov
2012-06-28 19:38   ` Daniel Vetter
2012-06-28 20:06     ` Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 13/21] drm/i915: add RPS configuration for Haswell Eugeni Dodonov
2012-06-29  9:56   ` Daniel Vetter
2012-06-29 13:49     ` Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 14/21] drm/i915: Add EDP Registers " Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 15/21] drm/i915: Timing initialization for eDP on HSW Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 16/21] drm/i915: Modesetting for eDP on HSw Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 17/21] drm/i915: Hook eDP initialization on DDI A Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 18/21] drm/i915: introduce haswell_init_clock_gating Eugeni Dodonov
2012-06-28 18:55 ` [PATCH 19/21] drm/i915: prevent bogus intel_update_fbc notifications Eugeni Dodonov
2012-06-28 19:24   ` Daniel Vetter
2012-06-28 20:11     ` Eugeni Dodonov
2012-07-04 17:41       ` Paulo Zanoni
2012-07-04 23:19         ` Eugeni Dodonov
2012-07-05  7:47           ` Daniel Vetter
2012-06-28 18:55 ` [PATCH 20/21] drm/i915: fix PIPE_WM_LINETIME definition Eugeni Dodonov
2012-06-28 19:39   ` Daniel Vetter
2012-06-28 18:55 ` [PATCH 21/21] drm/i915: enable RC6 workaround on Haswell Eugeni Dodonov
2012-06-28 19:23   ` Daniel Vetter
2012-06-28 20:10     ` Eugeni Dodonov
2012-06-28 19:22 ` [PATCH 00/21] More Haswell patches Paulo Zanoni

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