From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:46135) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SmTEy-00007Q-R4 for qemu-devel@nongnu.org; Wed, 04 Jul 2012 13:19:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SmTEw-0004VZ-Pq for qemu-devel@nongnu.org; Wed, 04 Jul 2012 13:19:48 -0400 Received: from cantor2.suse.de ([195.135.220.15]:47792 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SmTEw-0004V7-G2 for qemu-devel@nongnu.org; Wed, 04 Jul 2012 13:19:46 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 4 Jul 2012 19:19:25 +0200 Message-Id: <1341422373-13614-7-git-send-email-afaerber@suse.de> In-Reply-To: <1341422373-13614-1-git-send-email-afaerber@suse.de> References: <1341422373-13614-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 06/14] gt64xxx: QOM'ify GT64120 PCI host bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, jbaron@redhat.com, =?UTF-8?q?Andreas=20F=C3=A4rber?= , anthony@codemonkey.ws, mst@redhat.com Introduce type constant. Introduce cast macro to drop dummy busdev field used with FROM_SYSBUS() macro that would've broken SYS_BUS_DEVICE(). Avoid accessing DeviceState indirectly through PCIHostState. Signed-off-by: Andreas F=C3=A4rber --- hw/gt64xxx.c | 35 ++++++++++++++++++++--------------- 1 files changed, 20 insertions(+), 15 deletions(-) diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 04831bb..0677299 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -229,9 +229,14 @@ target_phys_addr_t regname ##_length; \ MemoryRegion regname ##_mem =20 +#define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120" + +#define GT64120_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE) + typedef struct GT64120State { - SysBusDevice busdev; PCIHostState pci; + uint32_t regs[GT_REGS]; PCI_MAPPING_ENTRY(PCI0IO); PCI_MAPPING_ENTRY(ISD); @@ -1083,31 +1088,31 @@ static void gt64120_reset(void *opaque) =20 PCIBus *gt64120_register(qemu_irq *pic) { - SysBusDevice *s; GT64120State *d; + PCIHostState *phb; DeviceState *dev; =20 - dev =3D qdev_create(NULL, "gt64120"); + dev =3D qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); qdev_init_nofail(dev); - s =3D sysbus_from_qdev(dev); - d =3D FROM_SYSBUS(GT64120State, s); - d->pci.bus =3D pci_register_bus(&d->busdev.qdev, "pci", - gt64120_pci_set_irq, gt64120_pci_map_i= rq, - pic, - get_system_memory(), - get_system_io(), - PCI_DEVFN(18, 0), 4); + d =3D GT64120_PCI_HOST_BRIDGE(dev); + phb =3D &d->pci; + phb->bus =3D pci_register_bus(dev, "pci", + gt64120_pci_set_irq, gt64120_pci_map_irq= , + pic, + get_system_memory(), + get_system_io(), + PCI_DEVFN(18, 0), 4); memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x100= 0); =20 - pci_create_simple(d->pci.bus, PCI_DEVFN(0, 0), "gt64120_pci"); - return d->pci.bus; + pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); + return phb->bus; } =20 static int gt64120_init(SysBusDevice *dev) { GT64120State *s; =20 - s =3D FROM_SYSBUS(GT64120State, dev); + s =3D GT64120_PCI_HOST_BRIDGE(dev); =20 /* FIXME: This value is computed from registers during reset, but so= me devices (e.g. VGA card) need to know it when they are registered. @@ -1162,7 +1167,7 @@ static void gt64120_class_init(ObjectClass *klass, = void *data) } =20 static const TypeInfo gt64120_info =3D { - .name =3D "gt64120", + .name =3D TYPE_GT64120_PCI_HOST_BRIDGE, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(GT64120State), .class_init =3D gt64120_class_init, --=20 1.7.7