From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756758Ab2HFRAp (ORCPT ); Mon, 6 Aug 2012 13:00:45 -0400 Received: from mail.x86-64.org ([217.9.48.20]:57558 "EHLO mail.x86-64.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756716Ab2HFRAn (ORCPT ); Mon, 6 Aug 2012 13:00:43 -0400 From: Borislav Petkov To: "H. Peter Anvin" Cc: Alex Shi , X86-ML , LKML , Borislav Petkov Subject: [PATCH v1 0/4] x86, CPU: TLB flushall shift, the AMD side Date: Mon, 6 Aug 2012 19:00:35 +0200 Message-Id: <1344272439-29080-1-git-send-email-bp@amd64.org> X-Mailer: git-send-email 1.7.11.rc1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Borislav Petkov Hi all, here's v1 with hpa's suggested changes. Changelog: * v0: now that the Intel TLB subset flushing patches are in mainline, here's the AMD side of the deal. Those have been tested on all our families with the mprotect microbenchmark. Any comments are appreciated. Thanks.