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Date: Tue, 9 Oct 2012 17:37:56 -0500
From: Scott Wood <scottwood@freescale.com>
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	(from r65777@freescale.com on Tue Oct  9 13:19:10 2012)
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Subject: Re: [Qemu-devel] [PATCH 2/2 v2] Adding BAR0 for e500 PCI controller
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To: Bharat Bhushan <r65777@freescale.com>
Cc: Bharat Bhushan <bharat.bhushan@freescale.com>, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, afaerber@suse.de, agraf@suse.de

On 10/09/2012 01:19:10 PM, Bharat Bhushan wrote:
> +static int e500_ccsr_initfn(SysBusDevice *dev)
> +{
> +    PPCE500CCSRState *pci_ccsr;
> +
> +    pci_ccsr =3D CCSR(dev);
> +    memory_region_init(&pci_ccsr->ccsr_space, "e500-ccsr",
> +                       MPC8544_CCSRBAR_SIZE);
> +    return 0;
> +}

Is this object supposed to represent CCSR (which is what the type name =20
seems to imply, along with the existence of a different =20
PPCE500PCIBridgeState) or PCI BAR0 (which is what pci_ccsr seems to =20
imply, along with the fact that it's being added in the PCI patch)?

-Scott=