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* [U-Boot] [PATCH 0/2] SMDK5250: Set Initial PMIC Values
@ 2013-01-15 10:25 Rajeshwari Shinde
  2013-01-15 10:25 ` [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold Rajeshwari Shinde
  2013-01-15 10:25 ` [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings Rajeshwari Shinde
  0 siblings, 2 replies; 5+ messages in thread
From: Rajeshwari Shinde @ 2013-01-15 10:25 UTC (permalink / raw)
  To: u-boot

This patch set seperates setting PMIC values form previous
"Convert lowlevel_init.S to .c" patch set.
These patches add PMIC MAX77686 voltage settings for SMDK5250.

Rajeshwari Shinde (2):
  EXYNOS5: Add function to setup set ps hold
  SMDK5250: Add PMIC voltage settings

 arch/arm/cpu/armv7/exynos/power.c        |   10 +++
 arch/arm/include/asm/arch-exynos/power.h |    8 ++
 board/samsung/smdk5250/smdk5250.c        |  113 +++++++++++++++++++++++++++++-
 include/power/max77686_pmic.h            |   30 ++++++++
 4 files changed, 159 insertions(+), 2 deletions(-)

-- 
1.7.4.4

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold
  2013-01-15 10:25 [U-Boot] [PATCH 0/2] SMDK5250: Set Initial PMIC Values Rajeshwari Shinde
@ 2013-01-15 10:25 ` Rajeshwari Shinde
  2013-01-21 23:29   ` Simon Glass
  2013-01-15 10:25 ` [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings Rajeshwari Shinde
  1 sibling, 1 reply; 5+ messages in thread
From: Rajeshwari Shinde @ 2013-01-15 10:25 UTC (permalink / raw)
  To: u-boot

This patch adds a function to set ps_hold data driving value high.
This enables the machine to stay powered on after the initial
power-on condition goes away(e.g. power button).

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
 arch/arm/cpu/armv7/exynos/power.c        |   10 ++++++++++
 arch/arm/include/asm/arch-exynos/power.h |    8 ++++++++
 2 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c
index d4bce6d..8572cfd 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -95,3 +95,13 @@ void set_dp_phy_ctrl(unsigned int enable)
 	if (cpu_is_exynos5())
 		exynos5_dp_phy_control(enable);
 }
+
+void power_ps_hold_setup(void)
+{
+	struct exynos5_power *power =
+		(struct exynos5_power *)samsung_get_base_power();
+
+	/* Set PS-Hold high */
+	setbits_le32(&power->ps_hold_control,
+			EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
+}
diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
index d2fdb59..85e2cd9 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -864,4 +864,12 @@ void set_dp_phy_ctrl(unsigned int enable);
 
 #define EXYNOS_DP_PHY_ENABLE		(1 << 0)
 
+#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH	(1 << 8)
+
+/*Set ps_hold data driving value high
+ * This enables the machine to stay powered on
+ * after the initial power-on condition goes away
+ * (e.g. power button).
+ */
+void power_ps_hold_setup(void);
 #endif
-- 
1.7.4.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings
  2013-01-15 10:25 [U-Boot] [PATCH 0/2] SMDK5250: Set Initial PMIC Values Rajeshwari Shinde
  2013-01-15 10:25 ` [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold Rajeshwari Shinde
@ 2013-01-15 10:25 ` Rajeshwari Shinde
  2013-01-22 13:51   ` Simon Glass
  1 sibling, 1 reply; 5+ messages in thread
From: Rajeshwari Shinde @ 2013-01-15 10:25 UTC (permalink / raw)
  To: u-boot

This patch adds required pmic voltage settings for SMDK5250.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
 board/samsung/smdk5250/smdk5250.c |  113 ++++++++++++++++++++++++++++++++++++-
 include/power/max77686_pmic.h     |   30 ++++++++++
 2 files changed, 141 insertions(+), 2 deletions(-)

diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 7a5f132..12cc03e 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -23,6 +23,7 @@
 #include <common.h>
 #include <fdtdec.h>
 #include <asm/io.h>
+#include <errno.h>
 #include <i2c.h>
 #include <lcd.h>
 #include <netdev.h>
@@ -35,6 +36,7 @@
 #include <asm/arch/sromc.h>
 #include <asm/arch/dp_info.h>
 #include <power/pmic.h>
+#include <power/max77686_pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -80,12 +82,119 @@ int dram_init(void)
 }
 
 #if defined(CONFIG_POWER)
+static int pmic_reg_update(struct pmic *p, int reg, uint regval)
+{
+	u32 val;
+	int ret = 0;
+
+	ret = pmic_reg_read(p, reg, &val);
+	if (ret) {
+		debug("%s: PMIC %d register read failed\n", __func__, reg);
+		return -1;
+	}
+	val |= regval;
+	ret = pmic_reg_write(p, reg, val);
+	if (ret) {
+		debug("%s: PMIC %d register write failed\n", __func__, reg);
+		return -1;
+	}
+	return 0;
+}
+
 int power_init_board(void)
 {
+	struct pmic *p;
+
+	power_ps_hold_setup();
+
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
 	if (pmic_init(I2C_PMIC))
 		return -1;
-	else
-		return 0;
+
+	p = pmic_get("MAX77686_PMIC");
+	if (!p)
+		return -ENODEV;
+
+	if (pmic_probe(p))
+		return -1;
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
+		return -1;
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
+				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
+		return -1;
+
+	/* VDD_MIF */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
+						MAX77686_BUCK1OUT_1V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+						MAX77686_REG_PMIC_BUCK1OUT);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
+						MAX77686_BUCK1CTRL_EN))
+		return -1;
+
+	/* VDD_ARM */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
+					MAX77686_BUCK2DVS1_1_3V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+						MAX77686_REG_PMIC_BUCK2DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
+					MAX77686_BUCK2CTRL_ON))
+		return -1;
+
+	/* VDD_INT */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
+					MAX77686_BUCK3DVS1_1_0125V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+						MAX77686_REG_PMIC_BUCK3DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
+					MAX77686_BUCK3CTRL_ON))
+		return -1;
+
+	/* VDD_G3D */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
+					MAX77686_BUCK4DVS1_1_2V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+						MAX77686_REG_PMIC_BUCK4DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
+					MAX77686_BUCK3CTRL_ON))
+		return -1;
+
+	/* VDD_LDO2 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
+				MAX77686_LD02CTRL1_1_5V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO3 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
+				MAX77686_LD03CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO5 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
+				MAX77686_LD05CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO10 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
+				MAX77686_LD10CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	return 0;
 }
 #endif
 
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index d949ace..5b7b6ce 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -155,4 +155,34 @@ enum {
 	EN_LDO = (0x3 << 6),
 };
 
+/* Buck1 1 volt value */
+#define MAX77686_BUCK1OUT_1V	0x5
+#define MAX77686_BUCK1CTRL_EN	(3 << 0)
+/* Buck2 1.3 volt value */
+#define MAX77686_BUCK2DVS1_1_3V	0x38
+#define MAX77686_BUCK2CTRL_ON	(1 << 4)
+/* Buck3 1.0125 volt value */
+#define MAX77686_BUCK3DVS1_1_0125V	0x21
+#define MAX77686_BUCK3CTRL_ON	(1 << 4)
+/* Buck4 1.2 volt value */
+#define MAX77686_BUCK4DVS1_1_2V	0x30
+#define MAX77686_BUCK4CTRL_ON	(1 << 4)
+/* LDO2 1.5 volt value */
+#define MAX77686_LD02CTRL1_1_5V	0x1c
+/* LDO3 1.8 volt value */
+#define MAX77686_LD03CTRL1_1_8V	0x14
+/* LDO5 1.8 volt value */
+#define MAX77686_LD05CTRL1_1_8V	0x14
+/* LDO10 1.8 volt value */
+#define MAX77686_LD10CTRL1_1_8V	0x14
+/* MAX77686_REG_PMIC_32KHZ set to 32KH CP
+ * output is activated
+ */
+#define MAX77686_32KHCP_EN	(1 << 1)
+/* MAX77686_REG_PMIC_BBAT set to
+ * Back up batery charger on and
+ * limit voltage setting to 3.5v
+ */
+#define MAX77686_BBCHOSTEN	(1 << 0)
+#define MAX77686_BBCVS_3_5V	(3 << 3)
 #endif /* __MAX77686_PMIC_H_ */
-- 
1.7.4.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold
  2013-01-15 10:25 ` [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold Rajeshwari Shinde
@ 2013-01-21 23:29   ` Simon Glass
  0 siblings, 0 replies; 5+ messages in thread
From: Simon Glass @ 2013-01-21 23:29 UTC (permalink / raw)
  To: u-boot

On Tue, Jan 15, 2013 at 2:25 AM, Rajeshwari Shinde
<rajeshwari.s@samsung.com> wrote:
> This patch adds a function to set ps_hold data driving value high.
> This enables the machine to stay powered on after the initial
> power-on condition goes away(e.g. power button).
>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>

Acked-by: Simon Glass <sjg@chromium.org>

> ---
>  arch/arm/cpu/armv7/exynos/power.c        |   10 ++++++++++
>  arch/arm/include/asm/arch-exynos/power.h |    8 ++++++++
>  2 files changed, 18 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c
> index d4bce6d..8572cfd 100644
> --- a/arch/arm/cpu/armv7/exynos/power.c
> +++ b/arch/arm/cpu/armv7/exynos/power.c
> @@ -95,3 +95,13 @@ void set_dp_phy_ctrl(unsigned int enable)
>         if (cpu_is_exynos5())
>                 exynos5_dp_phy_control(enable);
>  }
> +
> +void power_ps_hold_setup(void)
> +{
> +       struct exynos5_power *power =
> +               (struct exynos5_power *)samsung_get_base_power();
> +
> +       /* Set PS-Hold high */
> +       setbits_le32(&power->ps_hold_control,
> +                       EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
> +}
> diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
> index d2fdb59..85e2cd9 100644
> --- a/arch/arm/include/asm/arch-exynos/power.h
> +++ b/arch/arm/include/asm/arch-exynos/power.h
> @@ -864,4 +864,12 @@ void set_dp_phy_ctrl(unsigned int enable);
>
>  #define EXYNOS_DP_PHY_ENABLE           (1 << 0)
>
> +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH       (1 << 8)
> +
> +/*Set ps_hold data driving value high
> + * This enables the machine to stay powered on
> + * after the initial power-on condition goes away
> + * (e.g. power button).
> + */
> +void power_ps_hold_setup(void);
>  #endif
> --
> 1.7.4.4
>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings
  2013-01-15 10:25 ` [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings Rajeshwari Shinde
@ 2013-01-22 13:51   ` Simon Glass
  0 siblings, 0 replies; 5+ messages in thread
From: Simon Glass @ 2013-01-22 13:51 UTC (permalink / raw)
  To: u-boot

On Tue, Jan 15, 2013 at 2:25 AM, Rajeshwari Shinde
<rajeshwari.s@samsung.com> wrote:
> This patch adds required pmic voltage settings for SMDK5250.
>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>

Acked-by: Simon Glass <sjg@chromium.org>

(But see a comment nit below)

> ---
>  board/samsung/smdk5250/smdk5250.c |  113 ++++++++++++++++++++++++++++++++++++-
>  include/power/max77686_pmic.h     |   30 ++++++++++
>  2 files changed, 141 insertions(+), 2 deletions(-)
>
> diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
> index 7a5f132..12cc03e 100644
> --- a/board/samsung/smdk5250/smdk5250.c
> +++ b/board/samsung/smdk5250/smdk5250.c
> @@ -23,6 +23,7 @@
>  #include <common.h>
>  #include <fdtdec.h>
>  #include <asm/io.h>
> +#include <errno.h>
>  #include <i2c.h>
>  #include <lcd.h>
>  #include <netdev.h>
> @@ -35,6 +36,7 @@
>  #include <asm/arch/sromc.h>
>  #include <asm/arch/dp_info.h>
>  #include <power/pmic.h>
> +#include <power/max77686_pmic.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -80,12 +82,119 @@ int dram_init(void)
>  }
>
>  #if defined(CONFIG_POWER)
> +static int pmic_reg_update(struct pmic *p, int reg, uint regval)
> +{
> +       u32 val;
> +       int ret = 0;
> +
> +       ret = pmic_reg_read(p, reg, &val);
> +       if (ret) {
> +               debug("%s: PMIC %d register read failed\n", __func__, reg);
> +               return -1;
> +       }
> +       val |= regval;
> +       ret = pmic_reg_write(p, reg, val);
> +       if (ret) {
> +               debug("%s: PMIC %d register write failed\n", __func__, reg);
> +               return -1;
> +       }
> +       return 0;
> +}
> +
>  int power_init_board(void)
>  {
> +       struct pmic *p;
> +
> +       power_ps_hold_setup();
> +
> +       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> +
>         if (pmic_init(I2C_PMIC))
>                 return -1;
> -       else
> -               return 0;
> +
> +       p = pmic_get("MAX77686_PMIC");
> +       if (!p)
> +               return -ENODEV;
> +
> +       if (pmic_probe(p))
> +               return -1;
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
> +               return -1;
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
> +                               MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
> +               return -1;
> +
> +       /* VDD_MIF */
> +       if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
> +                                               MAX77686_BUCK1OUT_1V)) {
> +               debug("%s: PMIC %d register write failed\n", __func__,
> +                                               MAX77686_REG_PMIC_BUCK1OUT);
> +               return -1;
> +       }
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
> +                                               MAX77686_BUCK1CTRL_EN))
> +               return -1;
> +
> +       /* VDD_ARM */
> +       if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
> +                                       MAX77686_BUCK2DVS1_1_3V)) {
> +               debug("%s: PMIC %d register write failed\n", __func__,
> +                                               MAX77686_REG_PMIC_BUCK2DVS1);
> +               return -1;
> +       }
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
> +                                       MAX77686_BUCK2CTRL_ON))
> +               return -1;
> +
> +       /* VDD_INT */
> +       if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
> +                                       MAX77686_BUCK3DVS1_1_0125V)) {
> +               debug("%s: PMIC %d register write failed\n", __func__,
> +                                               MAX77686_REG_PMIC_BUCK3DVS1);
> +               return -1;
> +       }
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
> +                                       MAX77686_BUCK3CTRL_ON))
> +               return -1;
> +
> +       /* VDD_G3D */
> +       if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
> +                                       MAX77686_BUCK4DVS1_1_2V)) {
> +               debug("%s: PMIC %d register write failed\n", __func__,
> +                                               MAX77686_REG_PMIC_BUCK4DVS1);
> +               return -1;
> +       }
> +
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
> +                                       MAX77686_BUCK3CTRL_ON))
> +               return -1;
> +
> +       /* VDD_LDO2 */
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
> +                               MAX77686_LD02CTRL1_1_5V | EN_LDO))
> +               return -1;
> +
> +       /* VDD_LDO3 */
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
> +                               MAX77686_LD03CTRL1_1_8V | EN_LDO))
> +               return -1;
> +
> +       /* VDD_LDO5 */
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
> +                               MAX77686_LD05CTRL1_1_8V | EN_LDO))
> +               return -1;
> +
> +       /* VDD_LDO10 */
> +       if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
> +                               MAX77686_LD10CTRL1_1_8V | EN_LDO))
> +               return -1;
> +
> +       return 0;
>  }
>  #endif
>
> diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
> index d949ace..5b7b6ce 100644
> --- a/include/power/max77686_pmic.h
> +++ b/include/power/max77686_pmic.h
> @@ -155,4 +155,34 @@ enum {
>         EN_LDO = (0x3 << 6),
>  };
>
> +/* Buck1 1 volt value */
> +#define MAX77686_BUCK1OUT_1V   0x5
> +#define MAX77686_BUCK1CTRL_EN  (3 << 0)
> +/* Buck2 1.3 volt value */
> +#define MAX77686_BUCK2DVS1_1_3V        0x38
> +#define MAX77686_BUCK2CTRL_ON  (1 << 4)
> +/* Buck3 1.0125 volt value */
> +#define MAX77686_BUCK3DVS1_1_0125V     0x21
> +#define MAX77686_BUCK3CTRL_ON  (1 << 4)
> +/* Buck4 1.2 volt value */
> +#define MAX77686_BUCK4DVS1_1_2V        0x30
> +#define MAX77686_BUCK4CTRL_ON  (1 << 4)
> +/* LDO2 1.5 volt value */
> +#define MAX77686_LD02CTRL1_1_5V        0x1c
> +/* LDO3 1.8 volt value */
> +#define MAX77686_LD03CTRL1_1_8V        0x14
> +/* LDO5 1.8 volt value */
> +#define MAX77686_LD05CTRL1_1_8V        0x14
> +/* LDO10 1.8 volt value */
> +#define MAX77686_LD10CTRL1_1_8V        0x14
> +/* MAX77686_REG_PMIC_32KHZ set to 32KH CP
> + * output is activated
> + */
> +#define MAX77686_32KHCP_EN     (1 << 1)
> +/* MAX77686_REG_PMIC_BBAT set to
> + * Back up batery charger on and
> + * limit voltage setting to 3.5v
> + */

Multi-line comment style should be:

/*
 * MAX...
 */

Also perhaps try to expand the comment to fill the lines.

> +#define MAX77686_BBCHOSTEN     (1 << 0)
> +#define MAX77686_BBCVS_3_5V    (3 << 3)
>  #endif /* __MAX77686_PMIC_H_ */
> --
> 1.7.4.4
>

Regards,
Simon

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2013-01-22 13:51 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2013-01-15 10:25 [U-Boot] [PATCH 0/2] SMDK5250: Set Initial PMIC Values Rajeshwari Shinde
2013-01-15 10:25 ` [U-Boot] [PATCH 1/2] EXYNOS5: Add function to setup set ps hold Rajeshwari Shinde
2013-01-21 23:29   ` Simon Glass
2013-01-15 10:25 ` [U-Boot] [PATCH 2/2] SMDK5250: Add PMIC voltage settings Rajeshwari Shinde
2013-01-22 13:51   ` Simon Glass

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