From mboxrd@z Thu Jan 1 00:00:00 1970 From: Akshay Saraswat Date: Fri, 22 Mar 2013 08:26:36 -0400 Subject: [U-Boot] [PATCH] Exynos5: clock: Update the equation to calculate PLL output frequency Message-ID: <1363955196-1217-1-git-send-email-akshay.s@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de According to the latest exynos5 user manual, the equation for calculating PLL output was changed to FOUT= MDIV x FIN/(PDIV x 2^SDIV) earlier it was FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) So updating the clock code accordingly. Signed-off-by: Hatim Ali Signed-off-by: Akshay Saraswat --- arch/arm/cpu/armv7/exynos/clock.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 956427c..5299bc7 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -73,10 +73,8 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */ fout = (m + k / 1024) * (freq / (p * (1 << s))); } else { - if (s < 1) - s = 1; - /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ - fout = m * (freq / (p * (1 << (s - 1)))); + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ + fout = m * (freq / (p * (1 << s))); } return fout; -- 1.8.0