From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 5/9] drm/i915: use the correct clock when calculating linetime watermarks Date: Fri, 3 May 2013 17:23:41 -0300 Message-ID: <1367612625-4823-6-git-send-email-przanoni@gmail.com> References: <1367612625-4823-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-vb0-f43.google.com (mail-vb0-f43.google.com [209.85.212.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 869DFE5DED for ; Fri, 3 May 2013 13:24:18 -0700 (PDT) Received: by mail-vb0-f43.google.com with SMTP id p14so1711924vbm.30 for ; Fri, 03 May 2013 13:24:18 -0700 (PDT) In-Reply-To: <1367612625-4823-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni If we're using DP/eDP, adjusted_mode->clock may be just the port link clock, but we also can't use mode->clock because it's wrong when we're using the using panel fitter. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8468b40..3ca020c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2021,6 +2021,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = intel_crtc->pipe; struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode; + int target_clock; u32 temp; if (!intel_crtc_active(crtc)) { @@ -2028,6 +2029,11 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) return; } + if (intel_crtc->config.pixel_target_clock) + target_clock = intel_crtc->config.pixel_target_clock; + else + target_clock = intel_crtc->config.adjusted_mode.clock; + temp = I915_READ(PIPE_WM_LINETIME(pipe)); temp &= ~PIPE_WM_LINETIME_MASK; @@ -2035,7 +2041,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) * row at the given clock rate, multiplied by 8. * */ temp |= PIPE_WM_LINETIME_TIME( - DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock)); + DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, target_clock)); /* IPS watermarks are only used by pipe A, and are ignored by * pipes B and C. They are calculated similarly to the common -- 1.7.10.4