From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergey Yanovich Date: Tue, 21 May 2013 15:56:02 +0400 Subject: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram In-Reply-To: <201305211338.52145.marex@denx.de> References: <1369087586-1344-1-git-send-email-ynvich@gmail.com> <201305211254.59982.marex@denx.de> <1369135414.12900.3.camel@host5.omatika.ru> <201305211338.52145.marex@denx.de> Message-ID: <1369137362.12900.13.camel@host5.omatika.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Marek Vasut, On Tue, 2013-05-21 at 13:38 +0200, Marek Vasut wrote: > Yes, it's just an in-CPU RAM. Well, it is not 'just' RAM. It preserves its state during deep sleep and power off modes. > > Anyway, SRAM preserves its state when power is off. Poweroff time could > > be in years with a backup battery. In addition, D-Cache is an order of > > magnitude faster than SRAM (approx. 9 times) for both reads and writes. > > Is there any measurable difference between using DCache and SRAM? Do you have > any evidence that a speedup happens? I haven't done any special profiling. I am just relying on PXA270 EMTS table 6-14. The table says SRAM reads take 9 cycles, writes take 7 cycles. D-Cache operations take 1 cycle. > Still, the SRAM/DCache is only used until you leave board_init_f(), then it's > all DRAM. Yes, the patch as it is will only affects relocation speed and preserve SRAM from corruption. The speed gain can also be applied to uImage copying/unpacking, but that requires deeper understanding than I have at the moment.