From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [ARM] Bash often segfaults in Dom0 with the latest Xen Date: Wed, 5 Jun 2013 10:52:22 +0100 Message-ID: <1370425942.24512.172.camel@zakaz.uk.xensource.com> References: <51AE6DFD.3060308@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Christoffer Dall Cc: Andre Przywara , Julien Grall , Stefano Stabellini , xen-devel List-Id: xen-devel@lists.xenproject.org On Tue, 2013-06-04 at 18:38 -0700, Christoffer Dall wrote: > - Does dom0 run with Stage-2 translation? Yes. > If so, you should be able > to disable caches in both Hyp mode and for dom0 by manipulating the > hyp registers to try and exclude caches. If Linux doesn't boot under > such configuration, something else is completely broken, as it must be > transparent to your dom0. For some reason I had it in my head that the monitor used by the load/store exclusive instructions was somehow tied to the cache controller (i.e. you can't use them with caching disabled) which makes it impossible to disable caching if you are using them in your spinlock routines. I can't actually find anything to that affect in the ARM ARM now though -- Am/was I imagining things? > - Are you doing any swapping and/or page reclaiming? At the hypervisor level you mean? No. dom0 might be swapping itself but I don't think that is what you meant and I expect Julien doesn't have a swap device configured in any case. > - All other cache accesses should be coherent across cores and are > physically indexed/physically tagged so I don't see how this could be > your issue. Agreed. > - Are you managing the VMID properly across physical CPU migration? > (ensure that dom0 always uses the same vmid regardless of the physical > cpu) Currently VMID = DOMID + 1 so yes. Ian.