From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 24/31] drm/i915: asserts for lvds pre_enable Date: Fri, 14 Jun 2013 13:45:27 +0300 Message-ID: <1371206727.3647.14.camel@ideak-mobl> References: <1370432073-27634-1-git-send-email-daniel.vetter@ffwll.ch> <1370432073-27634-25-git-send-email-daniel.vetter@ffwll.ch> <1371155164.24509.20.camel@ideak-mobl> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FBADE5C05 for ; Fri, 14 Jun 2013 03:45:30 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, 2013-06-13 at 22:46 +0200, Daniel Vetter wrote: > On Thu, Jun 13, 2013 at 10:26 PM, Imre Deak wrote: > >> + if (HAS_PCH_SPLIT(dev)) { > >> + assert_fdi_rx_pll_disabled(dev_priv, pipe); > >> + assert_shared_dpll_disabled(dev_priv, > >> + intel_crtc_to_shared_dpll(crtc)); > > > > I think if we pick a shared PLL that is currently used by another port > > this will trigger. Should the PLL selection be limited to non-shared > > PLLs for LVDS? > > LVDS has a special clock selection setting and there's only eve one > LVDS port on any given machine. Which means we won't ever be able to > share the dpll with anything else. Ok, I should've looked closer and realize that dpll matching is not only about rate matching, but also matching the rest of dpll mode bits. But it's clear now we can't get here with a shared dpll, so the assert is ok. > I'll add this to the commit message when I resend the patch to fix up > the debug output. Ok. --Imre