From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44308) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Usb6j-00077E-JT for qemu-devel@nongnu.org; Fri, 28 Jun 2013 12:01:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Usb1p-0003kg-53 for qemu-devel@nongnu.org; Fri, 28 Jun 2013 11:56:17 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 28 Jun 2013 17:55:44 +0200 Message-Id: <1372434946-18489-23-git-send-email-afaerber@suse.de> In-Reply-To: <1372434946-18489-1-git-send-email-afaerber@suse.de> References: <1372434946-18489-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 22/24] cpu: Change qemu_init_vcpu() argument to CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Green , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:PowerPC" , Paul Brook , "Edgar E. Iglesias" , Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Richard Henderson This allows to move the call into CPUState's realizefn. Therefore move the stub into libqemustub.a. Reviewed-by: Richard Henderson Signed-off-by: Andreas F=C3=A4rber --- cpus.c | 5 +---- include/qemu-common.h | 8 -------- include/qom/cpu.h | 8 ++++++++ qom/cpu.c | 2 ++ stubs/cpus.c | 4 ++++ target-alpha/cpu.c | 3 --- target-arm/cpu.c | 1 - target-cris/cpu.c | 1 - target-i386/cpu.c | 1 - target-lm32/cpu.c | 2 -- target-m68k/cpu.c | 1 - target-microblaze/cpu.c | 1 - target-mips/cpu.c | 1 - target-moxie/cpu.c | 5 ++--- target-openrisc/cpu.c | 1 - target-ppc/translate_init.c | 2 -- target-s390x/cpu.c | 1 - target-sh4/cpu.c | 1 - target-sparc/cpu.c | 3 --- target-unicore32/cpu.c | 3 --- target-xtensa/cpu.c | 3 --- 21 files changed, 17 insertions(+), 40 deletions(-) diff --git a/cpus.c b/cpus.c index 06ab567..86571f9 100644 --- a/cpus.c +++ b/cpus.c @@ -1053,11 +1053,8 @@ static void qemu_dummy_start_vcpu(CPUState *cpu) } } =20 -void qemu_init_vcpu(void *_env) +void qemu_init_vcpu(CPUState *cpu) { - CPUArchState *env =3D _env; - CPUState *cpu =3D ENV_GET_CPU(env); - cpu->nr_cores =3D smp_cores; cpu->nr_threads =3D smp_threads; cpu->stopped =3D true; diff --git a/include/qemu-common.h b/include/qemu-common.h index 6010bba..f439738 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -295,14 +295,6 @@ struct qemu_work_item { int done; }; =20 -#ifdef CONFIG_USER_ONLY -static inline void qemu_init_vcpu(void *env) -{ -} -#else -void qemu_init_vcpu(void *env); -#endif - =20 /** * Sends a (part of) iovec down a socket, yielding when the socket is fu= ll, or diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 12b5099..d9b73db 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -428,6 +428,14 @@ void cpu_exit(CPUState *cpu); */ void cpu_resume(CPUState *cpu); =20 +/** + * qemu_init_vcpu: + * @cpu: The vCPU to initialize. + * + * Initializes a vCPU. + */ +void qemu_init_vcpu(CPUState *cpu); + #ifdef CONFIG_SOFTMMU extern const struct VMStateDescription vmstate_cpu_common; #else diff --git a/qom/cpu.c b/qom/cpu.c index 4da6332..ee8f632 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -209,6 +209,8 @@ static void cpu_common_realizefn(DeviceState *dev, Er= ror **errp) { CPUState *cpu =3D CPU(dev); =20 + qemu_init_vcpu(cpu); + if (dev->hotplugged) { cpu_synchronize_post_init(cpu); notifier_list_notify(&cpu_added_notifiers, dev); diff --git a/stubs/cpus.c b/stubs/cpus.c index f0d56c5..8e6f06b 100644 --- a/stubs/cpus.c +++ b/stubs/cpus.c @@ -4,3 +4,7 @@ void cpu_resume(CPUState *cpu) { } + +void qemu_init_vcpu(CPUState *cpu) +{ +} diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 7d7fdab..4e62eaf 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -26,11 +26,8 @@ =20 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { - AlphaCPU *cpu =3D ALPHA_CPU(dev); AlphaCPUClass *acc =3D ALPHA_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); - acc->parent_realize(dev, errp); } =20 diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 645c961..1bc227e 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -208,7 +208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) init_cpreg_list(cpu); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(env); =20 acc->parent_realize(dev, errp); } diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 82271f7..6a3bdf0 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -139,7 +139,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Erro= r **errp) CRISCPUClass *ccc =3D CRIS_CPU_GET_CLASS(dev); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); =20 ccc->parent_realize(dev, errp); } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 48c062f..b7416fe 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2392,7 +2392,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) #endif =20 mce_init(cpu); - qemu_init_vcpu(&cpu->env); =20 x86_cpu_apic_realize(cpu, &local_err); if (local_err !=3D NULL) { diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 2366152..02f8436 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -49,8 +49,6 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error = **errp) =20 cpu_reset(CPU(cpu)); =20 - qemu_init_vcpu(&cpu->env); - lcc->parent_realize(dev, errp); } =20 diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index d501027..799869f 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -147,7 +147,6 @@ static void m68k_cpu_realizefn(DeviceState *dev, Erro= r **errp) m68k_cpu_init_gdb(cpu); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); =20 mcc->parent_realize(dev, errp); } diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index e8104d1..b9a097c 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -92,7 +92,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **= errp) MicroBlazeCPUClass *mcc =3D MICROBLAZE_CPU_GET_CLASS(dev); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); =20 mcc->parent_realize(dev, errp); } diff --git a/target-mips/cpu.c b/target-mips/cpu.c index b685d39..0fdc316 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -48,7 +48,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error = **errp) MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(dev); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); =20 mcc->parent_realize(dev, errp); } diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c index 3c3932c..f3c0d22 100644 --- a/target-moxie/cpu.c +++ b/target-moxie/cpu.c @@ -44,12 +44,11 @@ static void moxie_cpu_reset(CPUState *s) static void moxie_cpu_realizefn(DeviceState *dev, Error **errp) { MoxieCPU *cpu =3D MOXIE_CPU(dev); - MoxieCPUClass *occ =3D MOXIE_CPU_GET_CLASS(dev); + MoxieCPUClass *mcc =3D MOXIE_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); cpu_reset(CPU(cpu)); =20 - occ->parent_realize(dev, errp); + mcc->parent_realize(dev, errp); } =20 static void moxie_cpu_initfn(Object *obj) diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index a401706..fd90d37 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -67,7 +67,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Er= ror **errp) OpenRISCCPU *cpu =3D OPENRISC_CPU(dev); OpenRISCCPUClass *occ =3D OPENRISC_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); cpu_reset(CPU(cpu)); =20 occ->parent_realize(dev, errp); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 0edb336..fa5e09f 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7752,8 +7752,6 @@ static void ppc_cpu_realizefn(DeviceState *dev, Err= or **errp) 34, "power-spe.xml", 0); } =20 - qemu_init_vcpu(env); - pcc->parent_realize(dev, errp); =20 #if defined(PPC_DUMP_CPU) diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index 8ec2f9b..c3697cd 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -102,7 +102,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Erro= r **errp) S390CPU *cpu =3D S390_CPU(dev); S390CPUClass *scc =3D S390_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); cpu_reset(CPU(cpu)); =20 scc->parent_realize(dev, errp); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index a7d5213..e739156 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -234,7 +234,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Er= ror **errp) SuperHCPUClass *scc =3D SUPERH_CPU_GET_CLASS(dev); =20 cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); =20 scc->parent_realize(dev, errp); } diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 72700cd..ff1200c 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -730,11 +730,8 @@ void sparc_cpu_dump_state(CPUState *cs, FILE *f, fpr= intf_function cpu_fprintf, =20 static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) { - SPARCCPU *cpu =3D SPARC_CPU(dev); SPARCCPUClass *scc =3D SPARC_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); - scc->parent_realize(dev, errp); } =20 diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 1a97e6b..6572f01 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -83,11 +83,8 @@ static const UniCore32CPUInfo uc32_cpus[] =3D { =20 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) { - UniCore32CPU *cpu =3D UNICORE32_CPU(dev); UniCore32CPUClass *ucc =3D UNICORE32_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); - ucc->parent_realize(dev, errp); } =20 diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index b5df321..0488984 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -59,11 +59,8 @@ static void xtensa_cpu_reset(CPUState *s) =20 static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) { - XtensaCPU *cpu =3D XTENSA_CPU(dev); XtensaCPUClass *xcc =3D XTENSA_CPU_GET_CLASS(dev); =20 - qemu_init_vcpu(&cpu->env); - xcc->parent_realize(dev, errp); } =20 --=20 1.8.1.4