From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UwvTl-0000H4-Bg for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:35:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UwvTa-0003e3-D9 for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:34:49 -0400 Received: from cantor2.suse.de ([195.135.220.15]:32799 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UwvTa-0003dG-40 for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:34:38 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 10 Jul 2013 16:34:05 +0200 Message-Id: <1373466860-32732-29-git-send-email-afaerber@suse.de> In-Reply-To: <1373466860-32732-1-git-send-email-afaerber@suse.de> References: <1373466860-32732-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 28/43] target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Walle , =?UTF-8?q?Andreas=20F=C3=A4rber?= Also use bool type while at it. Prepares for moving singlestep_enabled field to CPUState. Reviewed-by: Richard Henderson Signed-off-by: Andreas F=C3=A4rber --- target-lm32/translate.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 7d82dc7..ed12f50 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1012,9 +1012,10 @@ static void check_breakpoint(CPULM32State *env, Di= sasContext *dc) =20 /* generate intermediate code for basic block 'tb'. */ static inline -void gen_intermediate_code_internal(CPULM32State *env, - TranslationBlock *tb, int search_pc) +void gen_intermediate_code_internal(LM32CPU *cpu, + TranslationBlock *tb, bool search_pc= ) { + CPULM32State *env =3D &cpu->env; struct DisasContext ctx, *dc =3D &ctx; uint16_t *gen_opc_end; uint32_t pc_start; @@ -1134,12 +1135,12 @@ void gen_intermediate_code_internal(CPULM32State = *env, =20 void gen_intermediate_code(CPULM32State *env, struct TranslationBlock *t= b) { - gen_intermediate_code_internal(env, tb, 0); + gen_intermediate_code_internal(lm32_env_get_cpu(env), tb, false); } =20 void gen_intermediate_code_pc(CPULM32State *env, struct TranslationBlock= *tb) { - gen_intermediate_code_internal(env, tb, 1); + gen_intermediate_code_internal(lm32_env_get_cpu(env), tb, true); } =20 void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fpr= intf, --=20 1.8.1.4