From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33513) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UwvTn-0000MK-MJ for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:35:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UwvTb-0003fI-3Y for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:34:51 -0400 Received: from cantor2.suse.de ([195.135.220.15]:32816 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UwvTa-0003ed-RG for qemu-devel@nongnu.org; Wed, 10 Jul 2013 10:34:38 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 4CDCFA5464 for ; Wed, 10 Jul 2013 16:34:38 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 10 Jul 2013 16:34:15 +0200 Message-Id: <1373466860-32732-39-git-send-email-afaerber@suse.de> In-Reply-To: <1373466860-32732-1-git-send-email-afaerber@suse.de> References: <1373466860-32732-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 38/43] target-i386: Change do_interrupt_all() argument to X86CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Prepares for log_cpu_state() changing argument to CPUState. Signed-off-by: Andreas F=C3=A4rber --- target-i386/seg_helper.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 9c799e1..92caa84 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -1160,9 +1160,11 @@ static void handle_even_inj(CPUX86State *env, int = intno, int is_int, * the int instruction. next_eip is the env->eip value AFTER the interru= pt * instruction. It is only relevant if is_int is TRUE. */ -static void do_interrupt_all(CPUX86State *env, int intno, int is_int, +static void do_interrupt_all(X86CPU *cpu, int intno, int is_int, int error_code, target_ulong next_eip, int = is_hw) { + CPUX86State *env =3D &cpu->env; + if (qemu_loglevel_mask(CPU_LOG_INT)) { if ((env->cr[0] & CR0_PE_MASK)) { static int count; @@ -1252,7 +1254,7 @@ void x86_cpu_do_interrupt(CPUState *cs) /* simulate a real cpu exception. On i386, it can trigger new exceptions, but we do not handle double or triple faults yet. */ - do_interrupt_all(env, env->exception_index, + do_interrupt_all(cpu, env->exception_index, env->exception_is_int, env->error_code, env->exception_next_eip, 0); @@ -1263,7 +1265,7 @@ void x86_cpu_do_interrupt(CPUState *cs) =20 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw) { - do_interrupt_all(env, intno, 0, 0, 0, is_hw); + do_interrupt_all(x86_env_get_cpu(env), intno, 0, 0, 0, is_hw); } =20 void helper_enter_level(CPUX86State *env, int level, int data32, --=20 1.8.1.4