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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Fri, 12 Jul 2013 08:30:15 +1000
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Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 11/14] ioport: Switch
 dispatching to memory core layer
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To: Alexander Graf <agraf@suse.de>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>, qemu-devel Developers <qemu-devel@nongnu.org>, "qemu-ppc@nongnu.org list:PowerPC" <qemu-ppc@nongnu.org>, Paolo Bonzini <pbonzini@redhat.com>, Jan Kiszka <jan.kiszka@web.de>, Andreas =?ISO-8859-1?Q?F=E4rber?= <afaerber@suse.de>, =?ISO-8859-1?Q?Herv=E9?= Poussineau <hpoussin@reactos.org>

On Thu, 2013-07-11 at 15:28 +0200, Alexander Graf wrote:
> So IIUC before cpu_inw and inl were doing portio accesses in host
> native endianness. Now with this change they do little endian
> accesses. All sensible callers of cpu_inX assume that data is passed
> in native endianness though and already do the little endian
> conversion themselves.
> 
> Semantically having your PCI host bridge do the endianness conversion
> is the correct way of handling it, as that's where the conversion
> happens. If it makes life easier to do it in the isa bridging code,
> that's fine for me too though. But then we'll have to get rid of all
> endianness swaps that already happen in PCI bridges.

Or stop being utterly insane and remove all that endianness crap in
bridges etc... :-) The whole thing is completely ass backward to begin
with.

Cheers,
Ben.