From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 0/7] HSW/LPT clocking code additional sequences Date: Fri, 12 Jul 2013 14:19:35 -0300 Message-ID: <1373649582-19618-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ye0-f182.google.com (mail-ye0-f182.google.com [209.85.213.182]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E9A6E5F3B for ; Fri, 12 Jul 2013 10:20:00 -0700 (PDT) Received: by mail-ye0-f182.google.com with SMTP id m12so3253558yen.27 for ; Fri, 12 Jul 2013 10:20:00 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Hi On the code that allows Package C8+ we need to disable/reenable the PCH reference clocks and also disable/reenable LCPLL. This series implements the sequences that are going to be needed. I have local patches that use this code and they seem to work (we survive going to C10 and back to C7), and I also sent earlier versions of these patches to the mailing list, so open-source code that uses these functions already exists on the intel-gfx mailing list. The goal here is allow people to review/merge this while the final PC8+ patches are not yet 100% reviewer-compliant. On the first 3 patches we massage our code so we can reuse it for PC8+ code. On patch 4 we extend the current code to also implement one of the sequences required by PC8+. On patch 5 we implement the equivalent disable sequence, also needed by PC8+. On patch 6 we implement the functions to disable and restore LCPLL, and on patch 7 we add some assertions that are going to be used. If you want to review patches 1-3 all you need is C experience. For patches 4 and 5 you need to read the "Display iCLK programming" chapter of BSpec. For patches 6 and 7 you need to read "Display sequences for LCPLL disabling" and "Display sequences for Package C8". Cheers, Paulo Paulo Zanoni (7): drm/i915: remove SDV support from lpt_pch_init_refclk drm/i915: extract FDI mPHY functions from lpt_init_pch_refclk drm/i915: extract lpt_enable_clkout_dp from lpt_init_pch_refclk drm/i915: extend lpt_enable_clkout_dp drm/i915: disable CLKOUT_DP when it's not needed drm/i915: add functions to disable and restore LCPLL drm/i915: add some assertions to hsw_disable_lcpll drivers/gpu/drm/i915/i915_reg.h | 17 ++ drivers/gpu/drm/i915/intel_display.c | 359 +++++++++++++++++++++++++---------- drivers/gpu/drm/i915/intel_drv.h | 3 + 3 files changed, 276 insertions(+), 103 deletions(-) -- 1.8.1.2