* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-06 19:32 ` Rohit Vaswani
0 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-06 19:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds basic board support for APQ8074 Dragonboard
which belongs to the Snapdragon 800 family.
For now, just support a basic machine with device tree.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/apq8074-dragonboard.dts | 6 ++++++
arch/arm/boot/dts/msm8974.dtsi | 35 +++++++++++++++++++++++++++++++
arch/arm/mach-msm/Kconfig | 20 ++++++++++++++++--
arch/arm/mach-msm/Makefile | 1 +
arch/arm/mach-msm/board-dt-8974.c | 24 +++++++++++++++++++++
6 files changed, 86 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/apq8074-dragonboard.dts
create mode 100644 arch/arm/boot/dts/msm8974.dtsi
create mode 100644 arch/arm/mach-msm/board-dt-8974.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 641b3c9a..bea54a7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -97,7 +97,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
kirkwood-openblocks_a6.dtb
dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
- msm8960-cdp.dtb
+ msm8960-cdp.dtb \
+ apq8074-dragonboard.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-mirabox.dtb \
armada-370-rd.dtb \
diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
new file mode 100644
index 0000000..5b7b6a0
--- /dev/null
+++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
@@ -0,0 +1,6 @@
+/include/ "msm8974.dtsi"
+
+/ {
+ model = "Qualcomm APQ8074 Dragonboard";
+ compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
+};
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
new file mode 100644
index 0000000..f04b643
--- /dev/null
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -0,0 +1,35 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM8974";
+ compatible = "qcom,msm8974";
+ interrupt-parent = <&intc>;
+
+ soc: soc { };
+};
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+
+ intc: interrupt-controller at f9000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0xf9000000 0x1000>,
+ <0xf9002000 0x1000>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 2 0xf08>,
+ <1 3 0xf08>,
+ <1 4 0xf08>,
+ <1 1 0xf08>;
+ clock-frequency = <19200000>;
+ };
+};
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 905efc8..499e8fe 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1,12 +1,12 @@
if ARCH_MSM
comment "Qualcomm MSM SoC Type"
- depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+ depends on ARCH_MSM_DT
choice
prompt "Qualcomm MSM SoC Type"
default ARCH_MSM7X00A
- depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
+ depends on !ARCH_MSM_DT
config ARCH_MSM7X00A
bool "MSM7x00A / MSM7x01A"
@@ -60,6 +60,19 @@ config ARCH_MSM8960
select MSM_SCM if SMP
select USE_OF
+config ARCH_MSM8974
+ bool "MSM8974"
+ select ARM_GIC
+ select CPU_V7
+ select HAVE_ARM_ARCH_TIMER
+ select HAVE_SMP
+ select MSM_SCM if SMP
+ select USE_OF
+
+config ARCH_MSM_DT
+ def_bool y
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
+
config MSM_HAS_DEBUG_UART_HS
bool
@@ -68,6 +81,7 @@ config MSM_SOC_REV_A
config ARCH_MSM_ARM11
bool
+
config ARCH_MSM_SCORPION
bool
@@ -75,6 +89,7 @@ config MSM_VIC
bool
menu "Qualcomm MSM Board Type"
+ depends on !ARCH_MSM_DT
config MACH_HALIBUT
depends on ARCH_MSM
@@ -122,6 +137,7 @@ config MSM_SMD
config MSM_GPIOMUX
bool
+ depends on !ARCH_MSM_DT
help
Support for MSM V1 TLMM GPIOMUX architecture.
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index d257ff4..80e3b15 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
+obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
diff --git a/arch/arm/mach-msm/board-dt-8974.c b/arch/arm/mach-msm/board-dt-8974.c
new file mode 100644
index 0000000..01ed8d0
--- /dev/null
+++ b/arch/arm/mach-msm/board-dt-8974.c
@@ -0,0 +1,24 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+
+static const char * const msm8974_dt_match[] __initconst = {
+ "qcom,msm8974",
+ "qcom,apq8074",
+ NULL
+};
+
+DT_MACHINE_START(MSM8974_DT, "Qualcomm MSM (Flattened Device Tree)")
+ .dt_compat = msm8974_dt_match,
+MACHINE_END
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCHv3 2/2] defconfig: msm_defconfig: Enable CONFIG_ARCH_MSM8974
2013-09-06 19:32 ` Rohit Vaswani
@ 2013-09-06 19:32 ` Rohit Vaswani
-1 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-06 19:32 UTC (permalink / raw)
To: David Brown
Cc: Rohit Vaswani, Stephen Boyd, Russell King, Arnd Bergmann,
linux-arm-kernel, linux-arm-msm
This patch enables MSM8974 build support.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
arch/arm/configs/msm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
index 690b5f9..0ed32e5 100644
--- a/arch/arm/configs/msm_defconfig
+++ b/arch/arm/configs/msm_defconfig
@@ -20,6 +20,7 @@ CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MSM=y
CONFIG_ARCH_MSM8X60=y
CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
CONFIG_SMP=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCHv3 2/2] defconfig: msm_defconfig: Enable CONFIG_ARCH_MSM8974
@ 2013-09-06 19:32 ` Rohit Vaswani
0 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-06 19:32 UTC (permalink / raw)
To: linux-arm-kernel
This patch enables MSM8974 build support.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
arch/arm/configs/msm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
index 690b5f9..0ed32e5 100644
--- a/arch/arm/configs/msm_defconfig
+++ b/arch/arm/configs/msm_defconfig
@@ -20,6 +20,7 @@ CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MSM=y
CONFIG_ARCH_MSM8X60=y
CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
CONFIG_SMP=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-06 19:32 ` Rohit Vaswani
@ 2013-09-06 19:53 ` Josh Cartwright
-1 siblings, 0 replies; 32+ messages in thread
From: Josh Cartwright @ 2013-09-06 19:53 UTC (permalink / raw)
To: Rohit Vaswani
Cc: David Brown, Rob Herring, Pawel Moll, Mark Rutland,
Stephen Warren, Ian Campbell, Russell King, Daniel Walker,
Bryan Huntsman, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-msm
On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
>
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
[..]
> index 0000000..5b7b6a0
> --- /dev/null
> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "msm8974.dtsi"
> +
> +/ {
> + model = "Qualcomm APQ8074 Dragonboard";
> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + model = "Qualcomm MSM8974";
> + compatible = "qcom,msm8974";
> + interrupt-parent = <&intc>;
> +
> + soc: soc { };
> +};
> +
> +&soc {
Breaking these up seems a little odd to me, but okay.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> +
> + intc: interrupt-controller@f9000000 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0xf9000000 0x1000>,
> + <0xf9002000 0x1000>;
> + };
> +
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <1 2 0xf08>,
> + <1 3 0xf08>,
> + <1 4 0xf08>,
> + <1 1 0xf08>;
> + clock-frequency = <19200000>;
> + };
> +};
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..499e8fe 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
[..]
> +config ARCH_MSM8974
> + bool "MSM8974"
> + select ARM_GIC
> + select CPU_V7
> + select HAVE_ARM_ARCH_TIMER
> + select HAVE_SMP
> + select MSM_SCM if SMP
> + select USE_OF
> +
> +config ARCH_MSM_DT
> + def_bool y
> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
scripts/kconfig/conf --silentoldconfig Kconfig
#
# configuration written to .config
#
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
CC arch/arm/kernel/asm-offsets.s
GEN include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CC init/main.o
In file included from arch/arm/include/asm/irq.h:7:0,
from arch/arm/include/asm/hardirq.h:6,
from include/linux/hardirq.h:8,
from include/linux/ftrace_event.h:7,
from include/trace/syscall.h:6,
from include/linux/syscalls.h:79,
from init/main.c:18:
arch/arm/mach-msm/include/mach/irqs.h:35:2: error: #error "Unknown architecture specification"
#error "Unknown architecture specification"
^
arch/arm/mach-msm/include/mach/irqs.h:38:18: error: 'NR_MSM_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
arch/arm/mach-msm/include/mach/irqs.h:38:32: error: 'NR_GPIO_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
arch/arm/mach-msm/include/mach/irqs.h:38:47: error: 'NR_BOARD_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
make[1]: *** [init/main.o] Error 1
make: *** [init] Error 2
Josh
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-06 19:53 ` Josh Cartwright
0 siblings, 0 replies; 32+ messages in thread
From: Josh Cartwright @ 2013-09-06 19:53 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
>
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
[..]
> index 0000000..5b7b6a0
> --- /dev/null
> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "msm8974.dtsi"
> +
> +/ {
> + model = "Qualcomm APQ8074 Dragonboard";
> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + model = "Qualcomm MSM8974";
> + compatible = "qcom,msm8974";
> + interrupt-parent = <&intc>;
> +
> + soc: soc { };
> +};
> +
> +&soc {
Breaking these up seems a little odd to me, but okay.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> +
> + intc: interrupt-controller at f9000000 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0xf9000000 0x1000>,
> + <0xf9002000 0x1000>;
> + };
> +
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <1 2 0xf08>,
> + <1 3 0xf08>,
> + <1 4 0xf08>,
> + <1 1 0xf08>;
> + clock-frequency = <19200000>;
> + };
> +};
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..499e8fe 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
[..]
> +config ARCH_MSM8974
> + bool "MSM8974"
> + select ARM_GIC
> + select CPU_V7
> + select HAVE_ARM_ARCH_TIMER
> + select HAVE_SMP
> + select MSM_SCM if SMP
> + select USE_OF
> +
> +config ARCH_MSM_DT
> + def_bool y
> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
scripts/kconfig/conf --silentoldconfig Kconfig
#
# configuration written to .config
#
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
CC arch/arm/kernel/asm-offsets.s
GEN include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CC init/main.o
In file included from arch/arm/include/asm/irq.h:7:0,
from arch/arm/include/asm/hardirq.h:6,
from include/linux/hardirq.h:8,
from include/linux/ftrace_event.h:7,
from include/trace/syscall.h:6,
from include/linux/syscalls.h:79,
from init/main.c:18:
arch/arm/mach-msm/include/mach/irqs.h:35:2: error: #error "Unknown architecture specification"
#error "Unknown architecture specification"
^
arch/arm/mach-msm/include/mach/irqs.h:38:18: error: 'NR_MSM_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
arch/arm/mach-msm/include/mach/irqs.h:38:32: error: 'NR_GPIO_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
arch/arm/mach-msm/include/mach/irqs.h:38:47: error: 'NR_BOARD_IRQS' undeclared here (not in a function)
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
^
include/linux/irqdesc.h:76:33: note: in expansion of macro 'NR_IRQS'
extern struct irq_desc irq_desc[NR_IRQS];
^
make[1]: *** [init/main.o] Error 1
make: *** [init] Error 2
Josh
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
2013-09-06 19:53 ` Josh Cartwright
@ 2013-09-06 20:31 ` Stephen Boyd
-1 siblings, 0 replies; 32+ messages in thread
From: Stephen Boyd @ 2013-09-06 20:31 UTC (permalink / raw)
To: Josh Cartwright
Cc: Rohit Vaswani, David Brown, Rob Herring, Pawel Moll,
Mark Rutland, Stephen Warren, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
We don't want or need the irqs.h files from the DT based MSM
targets. Remove these header files and select sparse irq so that
we don't try to include the mach/irqs.h file.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
On 09/06, Josh Cartwright wrote:
>
> Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
I've been meaning to fix this. Perhaps you can use this patch as a base
and then push the SPARSE_IRQ selection into the DT config?
arch/arm/mach-msm/Kconfig | 2 +
arch/arm/mach-msm/include/mach/irqs-8960.h | 277 -----------------------------
arch/arm/mach-msm/include/mach/irqs-8x60.h | 258 ---------------------------
arch/arm/mach-msm/include/mach/irqs.h | 5 -
4 files changed, 2 insertions(+), 540 deletions(-)
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8960.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8x60.h
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 905efc8..30b3342 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,6 +50,7 @@ config ARCH_MSM8X60
select HAVE_SMP
select MSM_SCM if SMP
select USE_OF
+ select SPARSE_IRQ
config ARCH_MSM8960
bool "MSM8960"
@@ -59,6 +60,7 @@ config ARCH_MSM8960
select GPIO_MSM_V2
select MSM_SCM if SMP
select USE_OF
+ select SPARSE_IRQ
config MSM_HAS_DEBUG_UART_HS
bool
diff --git a/arch/arm/mach-msm/include/mach/irqs-8960.h b/arch/arm/mach-msm/include/mach/irqs-8960.h
deleted file mode 100644
index 81ab2a6..0000000
--- a/arch/arm/mach-msm/include/mach/irqs-8960.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/* Copyright (c) 2011 Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MSM_IRQS_8960_H
-#define __ASM_ARCH_MSM_IRQS_8960_H
-
-/* MSM ACPU Interrupt Numbers */
-
-/* 0-15: STI/SGI (software triggered/generated interrupts)
- 16-31: PPI (private peripheral interrupts)
- 32+: SPI (shared peripheral interrupts) */
-
-#define GIC_PPI_START 16
-#define GIC_SPI_START 32
-
-#define INT_VGIC (GIC_PPI_START + 0)
-#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
-#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
-#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
-#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
-#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
-#define AVS_SVICINT (GIC_PPI_START + 6)
-#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
-#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
-#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
-#define CPU_SICCPUXPERFMONIRPTREQ (GIC_PPI_START + 10)
-#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
-#define SC_AVSCPUXUP (GIC_PPI_START + 12)
-#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
-#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
-/* PPI 15 is unused */
-
-#define SC_SICMPUIRPTREQ (GIC_SPI_START + 0)
-#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)
-#define SC_SICL2PERFMONIRPTREQ (GIC_SPI_START + 2)
-#define SC_SICAGCIRPTREQ (GIC_SPI_START + 3)
-#define TLMM_APCC_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
-#define TLMM_APCC_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
-#define TLMM_APCC_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
-#define TLMM_APCC_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
-#define TLMM_APCC_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
-#define TLMM_APCC_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
-#define TLMM_APCC_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
-#define TLMM_APCC_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
-#define TLMM_APCC_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
-#define TLMM_APCC_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
-#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
-#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
-#define TLMM_APCC_SUMMARY_IRQ (GIC_SPI_START + 16)
-#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
-#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
-#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
-#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
-#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
-#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
-#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
-#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
-#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
-#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
-#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
-#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
-#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
-#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
-#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
-#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
-#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
-#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
-#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
-#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
-#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
-#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
-#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
-#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
-#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
-#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
-#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
-#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
-#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
-#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
-#define VPE_IRQ (GIC_SPI_START + 47)
-#define VFE_IRQ (GIC_SPI_START + 48)
-#define VCODEC_IRQ (GIC_SPI_START + 49)
-#define TV_ENC_IRQ (GIC_SPI_START + 50)
-#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
-#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
-#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
-#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
-#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
-#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
-#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
-#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
-#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
-#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
-#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
-#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
-#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
-#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
-#define SMMU_JPEGD_CB_SC_SECURE_IRQ (GIC_SPI_START + 65)
-#define SMMU_JPEGD_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 66)
-#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
-#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
-#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
-#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
-#define SMMU_GFX2D0_CB_SC_SECURE_IRQ (GIC_SPI_START + 71)
-#define SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 72)
-#define ROT_IRQ (GIC_SPI_START + 73)
-#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
-#define MDP_IRQ (GIC_SPI_START + 75)
-#define JPEGD_IRQ (GIC_SPI_START + 76)
-#define JPEG_IRQ (GIC_SPI_START + 77)
-#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
-#define HDMI_IRQ (GIC_SPI_START + 79)
-#define GFX3D_IRQ (GIC_SPI_START + 80)
-#define GFX2D0_IRQ (GIC_SPI_START + 81)
-#define DSI1_IRQ (GIC_SPI_START + 82)
-#define CSI_1_IRQ (GIC_SPI_START + 83)
-#define CSI_0_IRQ (GIC_SPI_START + 84)
-#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
-#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
-#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
-#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
-#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
-#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
-#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
-#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
-#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
-#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
-#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
-#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
-#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
-#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
-#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
-#define USB1_HS_IRQ (GIC_SPI_START + 100)
-#define SDC4_IRQ_0 (GIC_SPI_START + 101)
-#define SDC3_IRQ_0 (GIC_SPI_START + 102)
-#define SDC2_IRQ_0 (GIC_SPI_START + 103)
-#define SDC1_IRQ_0 (GIC_SPI_START + 104)
-#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
-#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
-#define SPS_MTI_0 (GIC_SPI_START + 107)
-#define SPS_MTI_1 (GIC_SPI_START + 108)
-#define SPS_MTI_2 (GIC_SPI_START + 109)
-#define SPS_MTI_3 (GIC_SPI_START + 110)
-#define SPS_MTI_4 (GIC_SPI_START + 111)
-#define SPS_MTI_5 (GIC_SPI_START + 112)
-#define SPS_MTI_6 (GIC_SPI_START + 113)
-#define SPS_MTI_7 (GIC_SPI_START + 114)
-#define SPS_MTI_8 (GIC_SPI_START + 115)
-#define SPS_MTI_9 (GIC_SPI_START + 116)
-#define SPS_MTI_10 (GIC_SPI_START + 117)
-#define SPS_MTI_11 (GIC_SPI_START + 118)
-#define SPS_MTI_12 (GIC_SPI_START + 119)
-#define SPS_MTI_13 (GIC_SPI_START + 120)
-#define SPS_MTI_14 (GIC_SPI_START + 121)
-#define SPS_MTI_15 (GIC_SPI_START + 122)
-#define SPS_MTI_16 (GIC_SPI_START + 123)
-#define SPS_MTI_17 (GIC_SPI_START + 124)
-#define SPS_MTI_18 (GIC_SPI_START + 125)
-#define SPS_MTI_19 (GIC_SPI_START + 126)
-#define SPS_MTI_20 (GIC_SPI_START + 127)
-#define SPS_MTI_21 (GIC_SPI_START + 128)
-#define SPS_MTI_22 (GIC_SPI_START + 129)
-#define SPS_MTI_23 (GIC_SPI_START + 130)
-#define SPS_MTI_24 (GIC_SPI_START + 131)
-#define SPS_MTI_25 (GIC_SPI_START + 132)
-#define SPS_MTI_26 (GIC_SPI_START + 133)
-#define SPS_MTI_27 (GIC_SPI_START + 134)
-#define SPS_MTI_28 (GIC_SPI_START + 135)
-#define SPS_MTI_29 (GIC_SPI_START + 136)
-#define SPS_MTI_30 (GIC_SPI_START + 137)
-#define SPS_MTI_31 (GIC_SPI_START + 138)
-#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
-#define CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
-#define USB2_IRQ (GIC_SPI_START + 141)
-#define USB1_IRQ (GIC_SPI_START + 142)
-#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
-#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
-#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
-#define GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
-#define GSBI1_QUP_IRQ (GIC_SPI_START + 147)
-#define GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
-#define GSBI2_QUP_IRQ (GIC_SPI_START + 149)
-#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
-#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
-#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
-#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
-#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
-#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
-#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
-#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
-#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
-#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
-#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
-#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
-#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
-#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
-#define TSIF2_IRQ (GIC_SPI_START + 164)
-#define TSIF1_IRQ (GIC_SPI_START + 165)
-#define DSI2_IRQ (GIC_SPI_START + 166)
-#define ISPIF_IRQ (GIC_SPI_START + 167)
-#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
-#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
-#define INT_ADM0_SCSS_0_IRQ (GIC_SPI_START + 170)
-#define INT_ADM0_SCSS_1_IRQ (GIC_SPI_START + 171)
-#define INT_ADM0_SCSS_2_IRQ (GIC_SPI_START + 172)
-#define INT_ADM0_SCSS_3_IRQ (GIC_SPI_START + 173)
-#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
-#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
-#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
-#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
-#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
-#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
-#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
-#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
-#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
-#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
-#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
-#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
-#define HSDDRX_EBI1CH1_IRQ (GIC_SPI_START + 186)
-#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
-#define SDC5_IRQ_0 (GIC_SPI_START + 188)
-#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
-#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
-#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
-#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
-#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
-#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
-#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
-#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
-#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
-#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
-#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
-#define RIVA_ASS_RESET_DONE_IRQ (GIC_SPI_START + 200)
-#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
-#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
-#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
-#define RIVA_APPS_WLAM_SMSM_IRQ (GIC_SPI_START + 204)
-#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
-#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
-#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
-#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
-#define A2_BAM_IRQ (GIC_SPI_START + 209)
-#define SMMU_GFX2D1_CB_SC_SECURE_IRQ (GIC_SPI_START + 210)
-#define SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 211)
-#define GFX2D1_IRQ (GIC_SPI_START + 212)
-#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
-#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
-#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
-#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
-#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
-#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
-#define TLMM_APCC_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
-#define TLMM_APCC_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
-#define TLMM_APCC_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
-#define TLMM_APCC_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
-#define TLMM_APCC_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
-#define TLMM_APCC_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
-#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
-#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
-
-/* For now, use the maximum number of interrupts until a pending GIC issue
- * is sorted out */
-#define NR_MSM_IRQS 1020
-#define NR_BOARD_IRQS 0
-#define NR_GPIO_IRQS 0
-
-#endif
-
diff --git a/arch/arm/mach-msm/include/mach/irqs-8x60.h b/arch/arm/mach-msm/include/mach/irqs-8x60.h
deleted file mode 100644
index f65841c..0000000
--- a/arch/arm/mach-msm/include/mach/irqs-8x60.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/* Copyright (c) 2010 Code Aurora Forum. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARCH_MSM_IRQS_8X60_H
-#define __ASM_ARCH_MSM_IRQS_8X60_H
-
-/* MSM ACPU Interrupt Numbers */
-
-/* 0-15: STI/SGI (software triggered/generated interrupts)
- * 16-31: PPI (private peripheral interrupts)
- * 32+: SPI (shared peripheral interrupts)
- */
-
-#define GIC_PPI_START 16
-#define GIC_SPI_START 32
-
-#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 0)
-#define INT_GP_TIMER_EXP (GIC_PPI_START + 1)
-#define INT_GP_TIMER2_EXP (GIC_PPI_START + 2)
-#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 3)
-#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
-#define AVS_SVICINT (GIC_PPI_START + 5)
-#define AVS_SVICINTSWDONE (GIC_PPI_START + 6)
-#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 7)
-#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 8)
-#define CPU_SICCPUXPERFMONIRPTREQ (GIC_PPI_START + 9)
-#define SC_AVSCPUXDOWN (GIC_PPI_START + 10)
-#define SC_AVSCPUXUP (GIC_PPI_START + 11)
-#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 12)
-/* PPI 13 to 15 are unused */
-
-
-#define SC_SICMPUIRPTREQ (GIC_SPI_START + 0)
-#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)
-#define SC_SICL2ACGIRPTREQ (GIC_SPI_START + 2)
-#define NC (GIC_SPI_START + 3)
-#define TLMM_SCSS_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
-#define TLMM_SCSS_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
-#define TLMM_SCSS_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
-#define TLMM_SCSS_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
-#define TLMM_SCSS_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
-#define TLMM_SCSS_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
-#define TLMM_SCSS_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
-#define TLMM_SCSS_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
-#define TLMM_SCSS_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
-#define TLMM_SCSS_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
-#define PM8058_SEC_IRQ_N (GIC_SPI_START + 14)
-#define PM8901_SEC_IRQ_N (GIC_SPI_START + 15)
-#define TLMM_SCSS_SUMMARY_IRQ (GIC_SPI_START + 16)
-#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
-#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
-#define RPM_SCSS_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
-#define RPM_SCSS_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
-#define RPM_SCSS_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
-#define RPM_SCSS_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
-#define RPM_SCSS_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
-#define RPM_SCSS_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
-#define RPM_SCSS_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
-#define RPM_SCSS_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
-#define SSBI2_2_SC_CPU0_SECURE_INT (GIC_SPI_START + 27)
-#define SSBI2_2_SC_CPU0_NON_SECURE_INT (GIC_SPI_START + 28)
-#define SSBI2_1_SC_CPU0_SECURE_INT (GIC_SPI_START + 29)
-#define SSBI2_1_SC_CPU0_NON_SECURE_INT (GIC_SPI_START + 30)
-#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
-#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
-#define MARM_FIQ (GIC_SPI_START + 33)
-#define MARM_IRQ (GIC_SPI_START + 34)
-#define MARM_L2CC_IRQ (GIC_SPI_START + 35)
-#define MARM_WDOG_EXPIRED (GIC_SPI_START + 36)
-#define MARM_SCSS_GP_IRQ_0 (GIC_SPI_START + 37)
-#define MARM_SCSS_GP_IRQ_1 (GIC_SPI_START + 38)
-#define MARM_SCSS_GP_IRQ_2 (GIC_SPI_START + 39)
-#define MARM_SCSS_GP_IRQ_3 (GIC_SPI_START + 40)
-#define MARM_SCSS_GP_IRQ_4 (GIC_SPI_START + 41)
-#define MARM_SCSS_GP_IRQ_5 (GIC_SPI_START + 42)
-#define MARM_SCSS_GP_IRQ_6 (GIC_SPI_START + 43)
-#define MARM_SCSS_GP_IRQ_7 (GIC_SPI_START + 44)
-#define MARM_SCSS_GP_IRQ_8 (GIC_SPI_START + 45)
-#define MARM_SCSS_GP_IRQ_9 (GIC_SPI_START + 46)
-#define VPE_IRQ (GIC_SPI_START + 47)
-#define VFE_IRQ (GIC_SPI_START + 48)
-#define VCODEC_IRQ (GIC_SPI_START + 49)
-#define TV_ENC_IRQ (GIC_SPI_START + 50)
-#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
-#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
-#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
-#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
-#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
-#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
-#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
-#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
-#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
-#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
-#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
-#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
-#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
-#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
-#define SMMU_JPEGD_CB_SC_SECURE_IRQ (GIC_SPI_START + 65)
-#define SMMU_JPEGD_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 66)
-#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
-#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
-#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
-#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
-#define SMMU_GFX2D0_CB_SC_SECURE_IRQ (GIC_SPI_START + 71)
-#define SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 72)
-#define ROT_IRQ (GIC_SPI_START + 73)
-#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
-#define MDP_IRQ (GIC_SPI_START + 75)
-#define JPEGD_IRQ (GIC_SPI_START + 76)
-#define JPEG_IRQ (GIC_SPI_START + 77)
-#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
-#define HDMI_IRQ (GIC_SPI_START + 79)
-#define GFX3D_IRQ (GIC_SPI_START + 80)
-#define GFX2D0_IRQ (GIC_SPI_START + 81)
-#define DSI_IRQ (GIC_SPI_START + 82)
-#define CSI_1_IRQ (GIC_SPI_START + 83)
-#define CSI_0_IRQ (GIC_SPI_START + 84)
-#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
-#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
-#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
-#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
-#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
-#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
-#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
-#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
-#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
-#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
-#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
-#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
-#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
-#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
-#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
-#define USB1_HS_IRQ (GIC_SPI_START + 100)
-#define SDC4_IRQ_0 (GIC_SPI_START + 101)
-#define SDC3_IRQ_0 (GIC_SPI_START + 102)
-#define SDC2_IRQ_0 (GIC_SPI_START + 103)
-#define SDC1_IRQ_0 (GIC_SPI_START + 104)
-#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
-#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
-#define SPS_MTI_0 (GIC_SPI_START + 107)
-#define SPS_MTI_1 (GIC_SPI_START + 108)
-#define SPS_MTI_2 (GIC_SPI_START + 109)
-#define SPS_MTI_3 (GIC_SPI_START + 110)
-#define SPS_MTI_4 (GIC_SPI_START + 111)
-#define SPS_MTI_5 (GIC_SPI_START + 112)
-#define SPS_MTI_6 (GIC_SPI_START + 113)
-#define SPS_MTI_7 (GIC_SPI_START + 114)
-#define SPS_MTI_8 (GIC_SPI_START + 115)
-#define SPS_MTI_9 (GIC_SPI_START + 116)
-#define SPS_MTI_10 (GIC_SPI_START + 117)
-#define SPS_MTI_11 (GIC_SPI_START + 118)
-#define SPS_MTI_12 (GIC_SPI_START + 119)
-#define SPS_MTI_13 (GIC_SPI_START + 120)
-#define SPS_MTI_14 (GIC_SPI_START + 121)
-#define SPS_MTI_15 (GIC_SPI_START + 122)
-#define SPS_MTI_16 (GIC_SPI_START + 123)
-#define SPS_MTI_17 (GIC_SPI_START + 124)
-#define SPS_MTI_18 (GIC_SPI_START + 125)
-#define SPS_MTI_19 (GIC_SPI_START + 126)
-#define SPS_MTI_20 (GIC_SPI_START + 127)
-#define SPS_MTI_21 (GIC_SPI_START + 128)
-#define SPS_MTI_22 (GIC_SPI_START + 129)
-#define SPS_MTI_23 (GIC_SPI_START + 130)
-#define SPS_MTI_24 (GIC_SPI_START + 131)
-#define SPS_MTI_25 (GIC_SPI_START + 132)
-#define SPS_MTI_26 (GIC_SPI_START + 133)
-#define SPS_MTI_27 (GIC_SPI_START + 134)
-#define SPS_MTI_28 (GIC_SPI_START + 135)
-#define SPS_MTI_29 (GIC_SPI_START + 136)
-#define SPS_MTI_30 (GIC_SPI_START + 137)
-#define SPS_MTI_31 (GIC_SPI_START + 138)
-#define UXMC_EBI2_WR_ER_DONE_IRQ (GIC_SPI_START + 139)
-#define UXMC_EBI2_OP_DONE_IRQ (GIC_SPI_START + 140)
-#define USB2_IRQ (GIC_SPI_START + 141)
-#define USB1_IRQ (GIC_SPI_START + 142)
-#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
-#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
-#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
-#define INT_UART1DM_IRQ (GIC_SPI_START + 146)
-#define GSBI1_QUP_IRQ (GIC_SPI_START + 147)
-#define INT_UART2DM_IRQ (GIC_SPI_START + 148)
-#define GSBI2_QUP_IRQ (GIC_SPI_START + 149)
-#define INT_UART3DM_IRQ (GIC_SPI_START + 150)
-#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
-#define INT_UART4DM_IRQ (GIC_SPI_START + 152)
-#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
-#define INT_UART5DM_IRQ (GIC_SPI_START + 154)
-#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
-#define INT_UART6DM_IRQ (GIC_SPI_START + 156)
-#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
-#define INT_UART7DM_IRQ (GIC_SPI_START + 158)
-#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
-#define INT_UART8DM_IRQ (GIC_SPI_START + 160)
-#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
-#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
-#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
-#define TSIF2_IRQ (GIC_SPI_START + 164)
-#define TSIF1_IRQ (GIC_SPI_START + 165)
-#define INT_ADM1_MASTER (GIC_SPI_START + 166)
-#define INT_ADM1_AARM (GIC_SPI_START + 167)
-#define INT_ADM1_SD2 (GIC_SPI_START + 168)
-#define INT_ADM1_SD3 (GIC_SPI_START + 169)
-#define INT_ADM0_MASTER (GIC_SPI_START + 170)
-#define INT_ADM0_AARM (GIC_SPI_START + 171)
-#define INT_ADM0_SD2 (GIC_SPI_START + 172)
-#define INT_ADM0_SD3 (GIC_SPI_START + 173)
-#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
-#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
-#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
-#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
-#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
-#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
-#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
-#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
-#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
-#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
-#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
-#define HSDDRX_SMICH0_IRQ (GIC_SPI_START + 185)
-#define HSDDRX_EBI1_IRQ (GIC_SPI_START + 186)
-#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
-#define SDC5_IRQ_0 (GIC_SPI_START + 188)
-#define INT_UART9DM_IRQ (GIC_SPI_START + 189)
-#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
-#define INT_UART10DM_IRQ (GIC_SPI_START + 191)
-#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
-#define INT_UART11DM_IRQ (GIC_SPI_START + 193)
-#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
-#define INT_UART12DM_IRQ (GIC_SPI_START + 195)
-#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
-
-/*SPI 197 to 209 arent used in 8x60*/
-#define SMMU_GFX2D1_CB_SC_SECURE_IRQ (GIC_SPI_START + 210)
-#define SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 211)
-
-/*SPI 212 to 216 arent used in 8x60*/
-#define SMPSS_SPARE_1 (GIC_SPI_START + 217)
-#define SMPSS_SPARE_2 (GIC_SPI_START + 218)
-#define SMPSS_SPARE_3 (GIC_SPI_START + 219)
-#define SMPSS_SPARE_4 (GIC_SPI_START + 220)
-#define SMPSS_SPARE_5 (GIC_SPI_START + 221)
-#define SMPSS_SPARE_6 (GIC_SPI_START + 222)
-#define SMPSS_SPARE_7 (GIC_SPI_START + 223)
-
-#define NR_GPIO_IRQS 173
-#define NR_MSM_IRQS 256
-#define NR_BOARD_IRQS 0
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index 3cd78b1..164d355 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -24,11 +24,6 @@
#elif defined(CONFIG_ARCH_QSD8X50)
#include "irqs-8x50.h"
#include "sirc.h"
-#elif defined(CONFIG_ARCH_MSM8X60)
-#include "irqs-8x60.h"
-#elif defined(CONFIG_ARCH_MSM8960)
-/* TODO: Make these not generic. */
-#include "irqs-8960.h"
#elif defined(CONFIG_ARCH_MSM_ARM11)
#include "irqs-7x00.h"
#else
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
@ 2013-09-06 20:31 ` Stephen Boyd
0 siblings, 0 replies; 32+ messages in thread
From: Stephen Boyd @ 2013-09-06 20:31 UTC (permalink / raw)
To: linux-arm-kernel
We don't want or need the irqs.h files from the DT based MSM
targets. Remove these header files and select sparse irq so that
we don't try to include the mach/irqs.h file.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
On 09/06, Josh Cartwright wrote:
>
> Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
I've been meaning to fix this. Perhaps you can use this patch as a base
and then push the SPARSE_IRQ selection into the DT config?
arch/arm/mach-msm/Kconfig | 2 +
arch/arm/mach-msm/include/mach/irqs-8960.h | 277 -----------------------------
arch/arm/mach-msm/include/mach/irqs-8x60.h | 258 ---------------------------
arch/arm/mach-msm/include/mach/irqs.h | 5 -
4 files changed, 2 insertions(+), 540 deletions(-)
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8960.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8x60.h
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 905efc8..30b3342 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,6 +50,7 @@ config ARCH_MSM8X60
select HAVE_SMP
select MSM_SCM if SMP
select USE_OF
+ select SPARSE_IRQ
config ARCH_MSM8960
bool "MSM8960"
@@ -59,6 +60,7 @@ config ARCH_MSM8960
select GPIO_MSM_V2
select MSM_SCM if SMP
select USE_OF
+ select SPARSE_IRQ
config MSM_HAS_DEBUG_UART_HS
bool
diff --git a/arch/arm/mach-msm/include/mach/irqs-8960.h b/arch/arm/mach-msm/include/mach/irqs-8960.h
deleted file mode 100644
index 81ab2a6..0000000
--- a/arch/arm/mach-msm/include/mach/irqs-8960.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/* Copyright (c) 2011 Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MSM_IRQS_8960_H
-#define __ASM_ARCH_MSM_IRQS_8960_H
-
-/* MSM ACPU Interrupt Numbers */
-
-/* 0-15: STI/SGI (software triggered/generated interrupts)
- 16-31: PPI (private peripheral interrupts)
- 32+: SPI (shared peripheral interrupts) */
-
-#define GIC_PPI_START 16
-#define GIC_SPI_START 32
-
-#define INT_VGIC (GIC_PPI_START + 0)
-#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
-#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
-#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
-#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
-#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
-#define AVS_SVICINT (GIC_PPI_START + 6)
-#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
-#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
-#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
-#define CPU_SICCPUXPERFMONIRPTREQ (GIC_PPI_START + 10)
-#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
-#define SC_AVSCPUXUP (GIC_PPI_START + 12)
-#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
-#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
-/* PPI 15 is unused */
-
-#define SC_SICMPUIRPTREQ (GIC_SPI_START + 0)
-#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)
-#define SC_SICL2PERFMONIRPTREQ (GIC_SPI_START + 2)
-#define SC_SICAGCIRPTREQ (GIC_SPI_START + 3)
-#define TLMM_APCC_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
-#define TLMM_APCC_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
-#define TLMM_APCC_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
-#define TLMM_APCC_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
-#define TLMM_APCC_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
-#define TLMM_APCC_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
-#define TLMM_APCC_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
-#define TLMM_APCC_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
-#define TLMM_APCC_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
-#define TLMM_APCC_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
-#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
-#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
-#define TLMM_APCC_SUMMARY_IRQ (GIC_SPI_START + 16)
-#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
-#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
-#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
-#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
-#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
-#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
-#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
-#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
-#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
-#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
-#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
-#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
-#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
-#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
-#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
-#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
-#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
-#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
-#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
-#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
-#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
-#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
-#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
-#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
-#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
-#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
-#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
-#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
-#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
-#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
-#define VPE_IRQ (GIC_SPI_START + 47)
-#define VFE_IRQ (GIC_SPI_START + 48)
-#define VCODEC_IRQ (GIC_SPI_START + 49)
-#define TV_ENC_IRQ (GIC_SPI_START + 50)
-#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
-#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
-#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
-#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
-#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
-#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
-#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
-#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
-#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
-#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
-#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
-#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
-#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
-#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
-#define SMMU_JPEGD_CB_SC_SECURE_IRQ (GIC_SPI_START + 65)
-#define SMMU_JPEGD_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 66)
-#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
-#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
-#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
-#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
-#define SMMU_GFX2D0_CB_SC_SECURE_IRQ (GIC_SPI_START + 71)
-#define SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 72)
-#define ROT_IRQ (GIC_SPI_START + 73)
-#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
-#define MDP_IRQ (GIC_SPI_START + 75)
-#define JPEGD_IRQ (GIC_SPI_START + 76)
-#define JPEG_IRQ (GIC_SPI_START + 77)
-#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
-#define HDMI_IRQ (GIC_SPI_START + 79)
-#define GFX3D_IRQ (GIC_SPI_START + 80)
-#define GFX2D0_IRQ (GIC_SPI_START + 81)
-#define DSI1_IRQ (GIC_SPI_START + 82)
-#define CSI_1_IRQ (GIC_SPI_START + 83)
-#define CSI_0_IRQ (GIC_SPI_START + 84)
-#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
-#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
-#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
-#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
-#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
-#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
-#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
-#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
-#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
-#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
-#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
-#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
-#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
-#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
-#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
-#define USB1_HS_IRQ (GIC_SPI_START + 100)
-#define SDC4_IRQ_0 (GIC_SPI_START + 101)
-#define SDC3_IRQ_0 (GIC_SPI_START + 102)
-#define SDC2_IRQ_0 (GIC_SPI_START + 103)
-#define SDC1_IRQ_0 (GIC_SPI_START + 104)
-#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
-#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
-#define SPS_MTI_0 (GIC_SPI_START + 107)
-#define SPS_MTI_1 (GIC_SPI_START + 108)
-#define SPS_MTI_2 (GIC_SPI_START + 109)
-#define SPS_MTI_3 (GIC_SPI_START + 110)
-#define SPS_MTI_4 (GIC_SPI_START + 111)
-#define SPS_MTI_5 (GIC_SPI_START + 112)
-#define SPS_MTI_6 (GIC_SPI_START + 113)
-#define SPS_MTI_7 (GIC_SPI_START + 114)
-#define SPS_MTI_8 (GIC_SPI_START + 115)
-#define SPS_MTI_9 (GIC_SPI_START + 116)
-#define SPS_MTI_10 (GIC_SPI_START + 117)
-#define SPS_MTI_11 (GIC_SPI_START + 118)
-#define SPS_MTI_12 (GIC_SPI_START + 119)
-#define SPS_MTI_13 (GIC_SPI_START + 120)
-#define SPS_MTI_14 (GIC_SPI_START + 121)
-#define SPS_MTI_15 (GIC_SPI_START + 122)
-#define SPS_MTI_16 (GIC_SPI_START + 123)
-#define SPS_MTI_17 (GIC_SPI_START + 124)
-#define SPS_MTI_18 (GIC_SPI_START + 125)
-#define SPS_MTI_19 (GIC_SPI_START + 126)
-#define SPS_MTI_20 (GIC_SPI_START + 127)
-#define SPS_MTI_21 (GIC_SPI_START + 128)
-#define SPS_MTI_22 (GIC_SPI_START + 129)
-#define SPS_MTI_23 (GIC_SPI_START + 130)
-#define SPS_MTI_24 (GIC_SPI_START + 131)
-#define SPS_MTI_25 (GIC_SPI_START + 132)
-#define SPS_MTI_26 (GIC_SPI_START + 133)
-#define SPS_MTI_27 (GIC_SPI_START + 134)
-#define SPS_MTI_28 (GIC_SPI_START + 135)
-#define SPS_MTI_29 (GIC_SPI_START + 136)
-#define SPS_MTI_30 (GIC_SPI_START + 137)
-#define SPS_MTI_31 (GIC_SPI_START + 138)
-#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
-#define CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
-#define USB2_IRQ (GIC_SPI_START + 141)
-#define USB1_IRQ (GIC_SPI_START + 142)
-#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
-#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
-#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
-#define GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
-#define GSBI1_QUP_IRQ (GIC_SPI_START + 147)
-#define GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
-#define GSBI2_QUP_IRQ (GIC_SPI_START + 149)
-#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
-#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
-#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
-#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
-#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
-#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
-#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
-#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
-#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
-#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
-#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
-#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
-#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
-#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
-#define TSIF2_IRQ (GIC_SPI_START + 164)
-#define TSIF1_IRQ (GIC_SPI_START + 165)
-#define DSI2_IRQ (GIC_SPI_START + 166)
-#define ISPIF_IRQ (GIC_SPI_START + 167)
-#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
-#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
-#define INT_ADM0_SCSS_0_IRQ (GIC_SPI_START + 170)
-#define INT_ADM0_SCSS_1_IRQ (GIC_SPI_START + 171)
-#define INT_ADM0_SCSS_2_IRQ (GIC_SPI_START + 172)
-#define INT_ADM0_SCSS_3_IRQ (GIC_SPI_START + 173)
-#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
-#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
-#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
-#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
-#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
-#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
-#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
-#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
-#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
-#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
-#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
-#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
-#define HSDDRX_EBI1CH1_IRQ (GIC_SPI_START + 186)
-#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
-#define SDC5_IRQ_0 (GIC_SPI_START + 188)
-#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
-#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
-#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
-#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
-#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
-#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
-#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
-#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
-#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
-#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
-#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
-#define RIVA_ASS_RESET_DONE_IRQ (GIC_SPI_START + 200)
-#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
-#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
-#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
-#define RIVA_APPS_WLAM_SMSM_IRQ (GIC_SPI_START + 204)
-#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
-#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
-#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
-#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
-#define A2_BAM_IRQ (GIC_SPI_START + 209)
-#define SMMU_GFX2D1_CB_SC_SECURE_IRQ (GIC_SPI_START + 210)
-#define SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 211)
-#define GFX2D1_IRQ (GIC_SPI_START + 212)
-#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
-#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
-#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
-#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
-#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
-#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
-#define TLMM_APCC_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
-#define TLMM_APCC_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
-#define TLMM_APCC_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
-#define TLMM_APCC_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
-#define TLMM_APCC_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
-#define TLMM_APCC_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
-#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
-#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
-
-/* For now, use the maximum number of interrupts until a pending GIC issue
- * is sorted out */
-#define NR_MSM_IRQS 1020
-#define NR_BOARD_IRQS 0
-#define NR_GPIO_IRQS 0
-
-#endif
-
diff --git a/arch/arm/mach-msm/include/mach/irqs-8x60.h b/arch/arm/mach-msm/include/mach/irqs-8x60.h
deleted file mode 100644
index f65841c..0000000
--- a/arch/arm/mach-msm/include/mach/irqs-8x60.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/* Copyright (c) 2010 Code Aurora Forum. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARCH_MSM_IRQS_8X60_H
-#define __ASM_ARCH_MSM_IRQS_8X60_H
-
-/* MSM ACPU Interrupt Numbers */
-
-/* 0-15: STI/SGI (software triggered/generated interrupts)
- * 16-31: PPI (private peripheral interrupts)
- * 32+: SPI (shared peripheral interrupts)
- */
-
-#define GIC_PPI_START 16
-#define GIC_SPI_START 32
-
-#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 0)
-#define INT_GP_TIMER_EXP (GIC_PPI_START + 1)
-#define INT_GP_TIMER2_EXP (GIC_PPI_START + 2)
-#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 3)
-#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
-#define AVS_SVICINT (GIC_PPI_START + 5)
-#define AVS_SVICINTSWDONE (GIC_PPI_START + 6)
-#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 7)
-#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 8)
-#define CPU_SICCPUXPERFMONIRPTREQ (GIC_PPI_START + 9)
-#define SC_AVSCPUXDOWN (GIC_PPI_START + 10)
-#define SC_AVSCPUXUP (GIC_PPI_START + 11)
-#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 12)
-/* PPI 13 to 15 are unused */
-
-
-#define SC_SICMPUIRPTREQ (GIC_SPI_START + 0)
-#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)
-#define SC_SICL2ACGIRPTREQ (GIC_SPI_START + 2)
-#define NC (GIC_SPI_START + 3)
-#define TLMM_SCSS_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
-#define TLMM_SCSS_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
-#define TLMM_SCSS_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
-#define TLMM_SCSS_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
-#define TLMM_SCSS_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
-#define TLMM_SCSS_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
-#define TLMM_SCSS_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
-#define TLMM_SCSS_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
-#define TLMM_SCSS_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
-#define TLMM_SCSS_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
-#define PM8058_SEC_IRQ_N (GIC_SPI_START + 14)
-#define PM8901_SEC_IRQ_N (GIC_SPI_START + 15)
-#define TLMM_SCSS_SUMMARY_IRQ (GIC_SPI_START + 16)
-#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
-#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
-#define RPM_SCSS_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
-#define RPM_SCSS_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
-#define RPM_SCSS_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
-#define RPM_SCSS_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
-#define RPM_SCSS_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
-#define RPM_SCSS_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
-#define RPM_SCSS_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
-#define RPM_SCSS_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
-#define SSBI2_2_SC_CPU0_SECURE_INT (GIC_SPI_START + 27)
-#define SSBI2_2_SC_CPU0_NON_SECURE_INT (GIC_SPI_START + 28)
-#define SSBI2_1_SC_CPU0_SECURE_INT (GIC_SPI_START + 29)
-#define SSBI2_1_SC_CPU0_NON_SECURE_INT (GIC_SPI_START + 30)
-#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
-#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
-#define MARM_FIQ (GIC_SPI_START + 33)
-#define MARM_IRQ (GIC_SPI_START + 34)
-#define MARM_L2CC_IRQ (GIC_SPI_START + 35)
-#define MARM_WDOG_EXPIRED (GIC_SPI_START + 36)
-#define MARM_SCSS_GP_IRQ_0 (GIC_SPI_START + 37)
-#define MARM_SCSS_GP_IRQ_1 (GIC_SPI_START + 38)
-#define MARM_SCSS_GP_IRQ_2 (GIC_SPI_START + 39)
-#define MARM_SCSS_GP_IRQ_3 (GIC_SPI_START + 40)
-#define MARM_SCSS_GP_IRQ_4 (GIC_SPI_START + 41)
-#define MARM_SCSS_GP_IRQ_5 (GIC_SPI_START + 42)
-#define MARM_SCSS_GP_IRQ_6 (GIC_SPI_START + 43)
-#define MARM_SCSS_GP_IRQ_7 (GIC_SPI_START + 44)
-#define MARM_SCSS_GP_IRQ_8 (GIC_SPI_START + 45)
-#define MARM_SCSS_GP_IRQ_9 (GIC_SPI_START + 46)
-#define VPE_IRQ (GIC_SPI_START + 47)
-#define VFE_IRQ (GIC_SPI_START + 48)
-#define VCODEC_IRQ (GIC_SPI_START + 49)
-#define TV_ENC_IRQ (GIC_SPI_START + 50)
-#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
-#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
-#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
-#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
-#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
-#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
-#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
-#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
-#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
-#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
-#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
-#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
-#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
-#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
-#define SMMU_JPEGD_CB_SC_SECURE_IRQ (GIC_SPI_START + 65)
-#define SMMU_JPEGD_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 66)
-#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
-#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
-#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
-#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
-#define SMMU_GFX2D0_CB_SC_SECURE_IRQ (GIC_SPI_START + 71)
-#define SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 72)
-#define ROT_IRQ (GIC_SPI_START + 73)
-#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
-#define MDP_IRQ (GIC_SPI_START + 75)
-#define JPEGD_IRQ (GIC_SPI_START + 76)
-#define JPEG_IRQ (GIC_SPI_START + 77)
-#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
-#define HDMI_IRQ (GIC_SPI_START + 79)
-#define GFX3D_IRQ (GIC_SPI_START + 80)
-#define GFX2D0_IRQ (GIC_SPI_START + 81)
-#define DSI_IRQ (GIC_SPI_START + 82)
-#define CSI_1_IRQ (GIC_SPI_START + 83)
-#define CSI_0_IRQ (GIC_SPI_START + 84)
-#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
-#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
-#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
-#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
-#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
-#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
-#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
-#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
-#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
-#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
-#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
-#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
-#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
-#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
-#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
-#define USB1_HS_IRQ (GIC_SPI_START + 100)
-#define SDC4_IRQ_0 (GIC_SPI_START + 101)
-#define SDC3_IRQ_0 (GIC_SPI_START + 102)
-#define SDC2_IRQ_0 (GIC_SPI_START + 103)
-#define SDC1_IRQ_0 (GIC_SPI_START + 104)
-#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
-#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
-#define SPS_MTI_0 (GIC_SPI_START + 107)
-#define SPS_MTI_1 (GIC_SPI_START + 108)
-#define SPS_MTI_2 (GIC_SPI_START + 109)
-#define SPS_MTI_3 (GIC_SPI_START + 110)
-#define SPS_MTI_4 (GIC_SPI_START + 111)
-#define SPS_MTI_5 (GIC_SPI_START + 112)
-#define SPS_MTI_6 (GIC_SPI_START + 113)
-#define SPS_MTI_7 (GIC_SPI_START + 114)
-#define SPS_MTI_8 (GIC_SPI_START + 115)
-#define SPS_MTI_9 (GIC_SPI_START + 116)
-#define SPS_MTI_10 (GIC_SPI_START + 117)
-#define SPS_MTI_11 (GIC_SPI_START + 118)
-#define SPS_MTI_12 (GIC_SPI_START + 119)
-#define SPS_MTI_13 (GIC_SPI_START + 120)
-#define SPS_MTI_14 (GIC_SPI_START + 121)
-#define SPS_MTI_15 (GIC_SPI_START + 122)
-#define SPS_MTI_16 (GIC_SPI_START + 123)
-#define SPS_MTI_17 (GIC_SPI_START + 124)
-#define SPS_MTI_18 (GIC_SPI_START + 125)
-#define SPS_MTI_19 (GIC_SPI_START + 126)
-#define SPS_MTI_20 (GIC_SPI_START + 127)
-#define SPS_MTI_21 (GIC_SPI_START + 128)
-#define SPS_MTI_22 (GIC_SPI_START + 129)
-#define SPS_MTI_23 (GIC_SPI_START + 130)
-#define SPS_MTI_24 (GIC_SPI_START + 131)
-#define SPS_MTI_25 (GIC_SPI_START + 132)
-#define SPS_MTI_26 (GIC_SPI_START + 133)
-#define SPS_MTI_27 (GIC_SPI_START + 134)
-#define SPS_MTI_28 (GIC_SPI_START + 135)
-#define SPS_MTI_29 (GIC_SPI_START + 136)
-#define SPS_MTI_30 (GIC_SPI_START + 137)
-#define SPS_MTI_31 (GIC_SPI_START + 138)
-#define UXMC_EBI2_WR_ER_DONE_IRQ (GIC_SPI_START + 139)
-#define UXMC_EBI2_OP_DONE_IRQ (GIC_SPI_START + 140)
-#define USB2_IRQ (GIC_SPI_START + 141)
-#define USB1_IRQ (GIC_SPI_START + 142)
-#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
-#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
-#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
-#define INT_UART1DM_IRQ (GIC_SPI_START + 146)
-#define GSBI1_QUP_IRQ (GIC_SPI_START + 147)
-#define INT_UART2DM_IRQ (GIC_SPI_START + 148)
-#define GSBI2_QUP_IRQ (GIC_SPI_START + 149)
-#define INT_UART3DM_IRQ (GIC_SPI_START + 150)
-#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
-#define INT_UART4DM_IRQ (GIC_SPI_START + 152)
-#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
-#define INT_UART5DM_IRQ (GIC_SPI_START + 154)
-#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
-#define INT_UART6DM_IRQ (GIC_SPI_START + 156)
-#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
-#define INT_UART7DM_IRQ (GIC_SPI_START + 158)
-#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
-#define INT_UART8DM_IRQ (GIC_SPI_START + 160)
-#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
-#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
-#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
-#define TSIF2_IRQ (GIC_SPI_START + 164)
-#define TSIF1_IRQ (GIC_SPI_START + 165)
-#define INT_ADM1_MASTER (GIC_SPI_START + 166)
-#define INT_ADM1_AARM (GIC_SPI_START + 167)
-#define INT_ADM1_SD2 (GIC_SPI_START + 168)
-#define INT_ADM1_SD3 (GIC_SPI_START + 169)
-#define INT_ADM0_MASTER (GIC_SPI_START + 170)
-#define INT_ADM0_AARM (GIC_SPI_START + 171)
-#define INT_ADM0_SD2 (GIC_SPI_START + 172)
-#define INT_ADM0_SD3 (GIC_SPI_START + 173)
-#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
-#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
-#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
-#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
-#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
-#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
-#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
-#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
-#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
-#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
-#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
-#define HSDDRX_SMICH0_IRQ (GIC_SPI_START + 185)
-#define HSDDRX_EBI1_IRQ (GIC_SPI_START + 186)
-#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
-#define SDC5_IRQ_0 (GIC_SPI_START + 188)
-#define INT_UART9DM_IRQ (GIC_SPI_START + 189)
-#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
-#define INT_UART10DM_IRQ (GIC_SPI_START + 191)
-#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
-#define INT_UART11DM_IRQ (GIC_SPI_START + 193)
-#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
-#define INT_UART12DM_IRQ (GIC_SPI_START + 195)
-#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
-
-/*SPI 197 to 209 arent used in 8x60*/
-#define SMMU_GFX2D1_CB_SC_SECURE_IRQ (GIC_SPI_START + 210)
-#define SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 211)
-
-/*SPI 212 to 216 arent used in 8x60*/
-#define SMPSS_SPARE_1 (GIC_SPI_START + 217)
-#define SMPSS_SPARE_2 (GIC_SPI_START + 218)
-#define SMPSS_SPARE_3 (GIC_SPI_START + 219)
-#define SMPSS_SPARE_4 (GIC_SPI_START + 220)
-#define SMPSS_SPARE_5 (GIC_SPI_START + 221)
-#define SMPSS_SPARE_6 (GIC_SPI_START + 222)
-#define SMPSS_SPARE_7 (GIC_SPI_START + 223)
-
-#define NR_GPIO_IRQS 173
-#define NR_MSM_IRQS 256
-#define NR_BOARD_IRQS 0
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index 3cd78b1..164d355 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -24,11 +24,6 @@
#elif defined(CONFIG_ARCH_QSD8X50)
#include "irqs-8x50.h"
#include "sirc.h"
-#elif defined(CONFIG_ARCH_MSM8X60)
-#include "irqs-8x60.h"
-#elif defined(CONFIG_ARCH_MSM8960)
-/* TODO: Make these not generic. */
-#include "irqs-8960.h"
#elif defined(CONFIG_ARCH_MSM_ARM11)
#include "irqs-7x00.h"
#else
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
2013-09-06 20:31 ` Stephen Boyd
@ 2013-09-06 20:50 ` Stephen Boyd
-1 siblings, 0 replies; 32+ messages in thread
From: Stephen Boyd @ 2013-09-06 20:50 UTC (permalink / raw)
To: Josh Cartwright
Cc: Rohit Vaswani, David Brown, Rob Herring, Pawel Moll,
Mark Rutland, Stephen Warren, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On 09/06/13 13:31, Stephen Boyd wrote:
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..30b3342 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -50,6 +50,7 @@ config ARCH_MSM8X60
> select HAVE_SMP
> select MSM_SCM if SMP
> select USE_OF
> + select SPARSE_IRQ
>
> config ARCH_MSM8960
> bool "MSM8960"
> @@ -59,6 +60,7 @@ config ARCH_MSM8960
> select GPIO_MSM_V2
> select MSM_SCM if SMP
> select USE_OF
> + select SPARSE_IRQ
Gah, I guess this needs to be sorted alphabetically.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
@ 2013-09-06 20:50 ` Stephen Boyd
0 siblings, 0 replies; 32+ messages in thread
From: Stephen Boyd @ 2013-09-06 20:50 UTC (permalink / raw)
To: linux-arm-kernel
On 09/06/13 13:31, Stephen Boyd wrote:
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..30b3342 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -50,6 +50,7 @@ config ARCH_MSM8X60
> select HAVE_SMP
> select MSM_SCM if SMP
> select USE_OF
> + select SPARSE_IRQ
>
> config ARCH_MSM8960
> bool "MSM8960"
> @@ -59,6 +60,7 @@ config ARCH_MSM8960
> select GPIO_MSM_V2
> select MSM_SCM if SMP
> select USE_OF
> + select SPARSE_IRQ
Gah, I guess this needs to be sorted alphabetically.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
2013-09-06 20:31 ` Stephen Boyd
@ 2013-09-06 20:55 ` Josh Cartwright
-1 siblings, 0 replies; 32+ messages in thread
From: Josh Cartwright @ 2013-09-06 20:55 UTC (permalink / raw)
To: Stephen Boyd
Cc: Rohit Vaswani, David Brown, Rob Herring, Pawel Moll,
Mark Rutland, Stephen Warren, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On Fri, Sep 06, 2013 at 01:31:57PM -0700, Stephen Boyd wrote:
> We don't want or need the irqs.h files from the DT based MSM
> targets. Remove these header files and select sparse irq so that
> we don't try to include the mach/irqs.h file.
>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
>
> On 09/06, Josh Cartwright wrote:
> >
> > Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
>
> I've been meaning to fix this. Perhaps you can use this patch as a base
> and then push the SPARSE_IRQ selection into the DT config?
Sounds sane to me. AFAICT, we didn't yet have any users of these
defines upstream. Using SPARSE_IRQ puts on the path of multiplatform
support anyway.
FWIW, I tested this by applying this change under Rohit's and squashing
the following with patch 1/2:
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index fe35acf..f4a0aaa 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,7 +50,6 @@ config ARCH_MSM8X60
select HAVE_SMP
select MSM_SCM if SMP
select USE_OF
- select SPARSE_IRQ
config ARCH_MSM8960
bool "MSM8960"
@@ -60,7 +59,6 @@ config ARCH_MSM8960
select GPIO_MSM_V2
select MSM_SCM if SMP
select USE_OF
- select SPARSE_IRQ
config ARCH_MSM8974
bool "MSM8974"
@@ -74,6 +72,7 @@ config ARCH_MSM8974
config ARCH_MSM_DT
def_bool y
depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
+ select SPARSE_IRQ
config MSM_HAS_DEBUG_UART_HS
bool
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH] ARM: msm: Remove irqs-*.h files for DT based targets
@ 2013-09-06 20:55 ` Josh Cartwright
0 siblings, 0 replies; 32+ messages in thread
From: Josh Cartwright @ 2013-09-06 20:55 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 06, 2013 at 01:31:57PM -0700, Stephen Boyd wrote:
> We don't want or need the irqs.h files from the DT based MSM
> targets. Remove these header files and select sparse irq so that
> we don't try to include the mach/irqs.h file.
>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
>
> On 09/06, Josh Cartwright wrote:
> >
> > Selecting _only_ ARCH_MSM8974 with these changes breaks the build with:
>
> I've been meaning to fix this. Perhaps you can use this patch as a base
> and then push the SPARSE_IRQ selection into the DT config?
Sounds sane to me. AFAICT, we didn't yet have any users of these
defines upstream. Using SPARSE_IRQ puts on the path of multiplatform
support anyway.
FWIW, I tested this by applying this change under Rohit's and squashing
the following with patch 1/2:
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index fe35acf..f4a0aaa 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,7 +50,6 @@ config ARCH_MSM8X60
select HAVE_SMP
select MSM_SCM if SMP
select USE_OF
- select SPARSE_IRQ
config ARCH_MSM8960
bool "MSM8960"
@@ -60,7 +59,6 @@ config ARCH_MSM8960
select GPIO_MSM_V2
select MSM_SCM if SMP
select USE_OF
- select SPARSE_IRQ
config ARCH_MSM8974
bool "MSM8974"
@@ -74,6 +72,7 @@ config ARCH_MSM8974
config ARCH_MSM_DT
def_bool y
depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
+ select SPARSE_IRQ
config MSM_HAS_DEBUG_UART_HS
bool
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-06 19:32 ` Rohit Vaswani
@ 2013-09-06 21:50 ` Olof Johansson
-1 siblings, 0 replies; 32+ messages in thread
From: Olof Johansson @ 2013-09-06 21:50 UTC (permalink / raw)
To: Rohit Vaswani
Cc: David Brown, Rob Herring, Pawel Moll, Mark Rutland,
Stephen Warren, Ian Campbell, Russell King, Daniel Walker,
Bryan Huntsman, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-msm
Hi,
Some comments below.
On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
>
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
> arch/arm/boot/dts/Makefile | 3 ++-
> arch/arm/boot/dts/apq8074-dragonboard.dts | 6 ++++++
> arch/arm/boot/dts/msm8974.dtsi | 35 +++++++++++++++++++++++++++++++
> arch/arm/mach-msm/Kconfig | 20 ++++++++++++++++--
> arch/arm/mach-msm/Makefile | 1 +
> arch/arm/mach-msm/board-dt-8974.c | 24 +++++++++++++++++++++
> 6 files changed, 86 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/boot/dts/apq8074-dragonboard.dts
> create mode 100644 arch/arm/boot/dts/msm8974.dtsi
> create mode 100644 arch/arm/mach-msm/board-dt-8974.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 641b3c9a..bea54a7 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -97,7 +97,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
> kirkwood-openblocks_a6.dtb
> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
> - msm8960-cdp.dtb
> + msm8960-cdp.dtb \
> + apq8074-dragonboard.dtb
Please add boards alphabetically.
> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
> armada-370-mirabox.dtb \
> armada-370-rd.dtb \
> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
> new file mode 100644
> index 0000000..5b7b6a0
> --- /dev/null
> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
family or vendor is used as a prefix to keep things a bit more organized. In
that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
> @@ -0,0 +1,6 @@
> +/include/ "msm8974.dtsi"
> +
> +/ {
> + model = "Qualcomm APQ8074 Dragonboard";
> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
Ok, I'm all for merging a early minimal dts file, but things like memory and
a default bootargs tend to make sense.
> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + model = "Qualcomm MSM8974";
> + compatible = "qcom,msm8974";
the board uses "qcom,apq8074" and this overrides this. Which way is it?
> + interrupt-parent = <&intc>;
> +
> + soc: soc { };
For files that include this it's ok to use the &phandle syntax, but in this
base dtsi, please use proper structure. In other words, move the contents of
the soc node up above instead.
> +};
> +
> +&soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> +
> + intc: interrupt-controller@f9000000 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0xf9000000 0x1000>,
> + <0xf9002000 0x1000>;
> + };
> +
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <1 2 0xf08>,
> + <1 3 0xf08>,
> + <1 4 0xf08>,
> + <1 1 0xf08>;
> + clock-frequency = <19200000>;
> + };
> +};
It'd make a lot of sense to include at least cpu nodes here as well, and
ideally basics for the drivers you have already merged, such as uarts.
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..499e8fe 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -1,12 +1,12 @@
> if ARCH_MSM
>
> comment "Qualcomm MSM SoC Type"
> - depends on (ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on ARCH_MSM_DT
>
> choice
> prompt "Qualcomm MSM SoC Type"
> default ARCH_MSM7X00A
> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on !ARCH_MSM_DT
This has nothing to do with adding support for dragonboard. Please break
out the cleanup separately.
I'm not sure what the purpose of ARCH_MSM_DT is either, it just looks to
complicate matter here?
> +config ARCH_MSM8974
> + bool "MSM8974"
> + select ARM_GIC
> + select CPU_V7
> + select HAVE_ARM_ARCH_TIMER
> + select HAVE_SMP
> + select MSM_SCM if SMP
> + select USE_OF
> +
> +config ARCH_MSM_DT
> + def_bool y
> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
> config MSM_HAS_DEBUG_UART_HS
> bool
>
> @@ -68,6 +81,7 @@ config MSM_SOC_REV_A
>
> config ARCH_MSM_ARM11
> bool
> +
> config ARCH_MSM_SCORPION
> bool
>
> @@ -75,6 +89,7 @@ config MSM_VIC
> bool
>
> menu "Qualcomm MSM Board Type"
> + depends on !ARCH_MSM_DT
>
> config MACH_HALIBUT
> depends on ARCH_MSM
> @@ -122,6 +137,7 @@ config MSM_SMD
>
> config MSM_GPIOMUX
> bool
> + depends on !ARCH_MSM_DT
> help
> Support for MSM V1 TLMM GPIOMUX architecture.
All of the above should be in a separate patch and motivated.
>
> diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
> index d257ff4..80e3b15 100644
> --- a/arch/arm/mach-msm/Makefile
> +++ b/arch/arm/mach-msm/Makefile
> @@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
> obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
> obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
> obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
> +obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
> obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
> obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
> diff --git a/arch/arm/mach-msm/board-dt-8974.c b/arch/arm/mach-msm/board-dt-8974.c
> new file mode 100644
> index 0000000..01ed8d0
> --- /dev/null
> +++ b/arch/arm/mach-msm/board-dt-8974.c
> @@ -0,0 +1,24 @@
> +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/of_platform.h>
> +#include <asm/mach/arch.h>
> +
> +static const char * const msm8974_dt_match[] __initconst = {
> + "qcom,msm8974",
> + "qcom,apq8074",
> + NULL
> +};
> +
> +DT_MACHINE_START(MSM8974_DT, "Qualcomm MSM (Flattened Device Tree)")
> + .dt_compat = msm8974_dt_match,
> +MACHINE_END
This file should be shared across SoCs. You should avoid adding a new dt board
file for every SoC like this.
-Olof
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-06 21:50 ` Olof Johansson
0 siblings, 0 replies; 32+ messages in thread
From: Olof Johansson @ 2013-09-06 21:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Some comments below.
On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
>
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
> arch/arm/boot/dts/Makefile | 3 ++-
> arch/arm/boot/dts/apq8074-dragonboard.dts | 6 ++++++
> arch/arm/boot/dts/msm8974.dtsi | 35 +++++++++++++++++++++++++++++++
> arch/arm/mach-msm/Kconfig | 20 ++++++++++++++++--
> arch/arm/mach-msm/Makefile | 1 +
> arch/arm/mach-msm/board-dt-8974.c | 24 +++++++++++++++++++++
> 6 files changed, 86 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/boot/dts/apq8074-dragonboard.dts
> create mode 100644 arch/arm/boot/dts/msm8974.dtsi
> create mode 100644 arch/arm/mach-msm/board-dt-8974.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 641b3c9a..bea54a7 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -97,7 +97,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
> kirkwood-openblocks_a6.dtb
> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
> - msm8960-cdp.dtb
> + msm8960-cdp.dtb \
> + apq8074-dragonboard.dtb
Please add boards alphabetically.
> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
> armada-370-mirabox.dtb \
> armada-370-rd.dtb \
> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
> new file mode 100644
> index 0000000..5b7b6a0
> --- /dev/null
> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
family or vendor is used as a prefix to keep things a bit more organized. In
that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
> @@ -0,0 +1,6 @@
> +/include/ "msm8974.dtsi"
> +
> +/ {
> + model = "Qualcomm APQ8074 Dragonboard";
> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
Ok, I'm all for merging a early minimal dts file, but things like memory and
a default bootargs tend to make sense.
> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + model = "Qualcomm MSM8974";
> + compatible = "qcom,msm8974";
the board uses "qcom,apq8074" and this overrides this. Which way is it?
> + interrupt-parent = <&intc>;
> +
> + soc: soc { };
For files that include this it's ok to use the &phandle syntax, but in this
base dtsi, please use proper structure. In other words, move the contents of
the soc node up above instead.
> +};
> +
> +&soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> +
> + intc: interrupt-controller at f9000000 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0xf9000000 0x1000>,
> + <0xf9002000 0x1000>;
> + };
> +
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <1 2 0xf08>,
> + <1 3 0xf08>,
> + <1 4 0xf08>,
> + <1 1 0xf08>;
> + clock-frequency = <19200000>;
> + };
> +};
It'd make a lot of sense to include at least cpu nodes here as well, and
ideally basics for the drivers you have already merged, such as uarts.
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 905efc8..499e8fe 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -1,12 +1,12 @@
> if ARCH_MSM
>
> comment "Qualcomm MSM SoC Type"
> - depends on (ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on ARCH_MSM_DT
>
> choice
> prompt "Qualcomm MSM SoC Type"
> default ARCH_MSM7X00A
> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on !ARCH_MSM_DT
This has nothing to do with adding support for dragonboard. Please break
out the cleanup separately.
I'm not sure what the purpose of ARCH_MSM_DT is either, it just looks to
complicate matter here?
> +config ARCH_MSM8974
> + bool "MSM8974"
> + select ARM_GIC
> + select CPU_V7
> + select HAVE_ARM_ARCH_TIMER
> + select HAVE_SMP
> + select MSM_SCM if SMP
> + select USE_OF
> +
> +config ARCH_MSM_DT
> + def_bool y
> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
> config MSM_HAS_DEBUG_UART_HS
> bool
>
> @@ -68,6 +81,7 @@ config MSM_SOC_REV_A
>
> config ARCH_MSM_ARM11
> bool
> +
> config ARCH_MSM_SCORPION
> bool
>
> @@ -75,6 +89,7 @@ config MSM_VIC
> bool
>
> menu "Qualcomm MSM Board Type"
> + depends on !ARCH_MSM_DT
>
> config MACH_HALIBUT
> depends on ARCH_MSM
> @@ -122,6 +137,7 @@ config MSM_SMD
>
> config MSM_GPIOMUX
> bool
> + depends on !ARCH_MSM_DT
> help
> Support for MSM V1 TLMM GPIOMUX architecture.
All of the above should be in a separate patch and motivated.
>
> diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
> index d257ff4..80e3b15 100644
> --- a/arch/arm/mach-msm/Makefile
> +++ b/arch/arm/mach-msm/Makefile
> @@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
> obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
> obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
> obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
> +obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
> obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
> obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
> diff --git a/arch/arm/mach-msm/board-dt-8974.c b/arch/arm/mach-msm/board-dt-8974.c
> new file mode 100644
> index 0000000..01ed8d0
> --- /dev/null
> +++ b/arch/arm/mach-msm/board-dt-8974.c
> @@ -0,0 +1,24 @@
> +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/of_platform.h>
> +#include <asm/mach/arch.h>
> +
> +static const char * const msm8974_dt_match[] __initconst = {
> + "qcom,msm8974",
> + "qcom,apq8074",
> + NULL
> +};
> +
> +DT_MACHINE_START(MSM8974_DT, "Qualcomm MSM (Flattened Device Tree)")
> + .dt_compat = msm8974_dt_match,
> +MACHINE_END
This file should be shared across SoCs. You should avoid adding a new dt board
file for every SoC like this.
-Olof
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-06 21:50 ` Olof Johansson
@ 2013-09-09 17:48 ` Rohit Vaswani
-1 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 17:48 UTC (permalink / raw)
To: Olof Johansson
Cc: David Brown, Rob Herring, Pawel Moll, Mark Rutland,
Stephen Warren, Ian Campbell, Russell King, Daniel Walker,
Bryan Huntsman, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-msm
On 9/6/2013 2:50 PM, Olof Johansson wrote:
> Hi,
>
> Some comments below.
>
> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>> This patch adds basic board support for APQ8074 Dragonboard
>> <snip>
>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>> - msm8960-cdp.dtb
>> + msm8960-cdp.dtb \
>> + apq8074-dragonboard.dtb
> Please add boards alphabetically.
Will do.
>
>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>> armada-370-mirabox.dtb \
>> armada-370-rd.dtb \
>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>> new file mode 100644
>> index 0000000..5b7b6a0
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
> family or vendor is used as a prefix to keep things a bit more organized. In
> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
Sure. But the board is called an APQ8074 and we wanted to keep the
naming consistent with that.
>> @@ -0,0 +1,6 @@
>> +/include/ "msm8974.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm APQ8074 Dragonboard";
>> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
> Ok, I'm all for merging a early minimal dts file, but things like memory and
> a default bootargs tend to make sense.
>
>> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm MSM8974";
>> + compatible = "qcom,msm8974";
> the board uses "qcom,apq8074" and this overrides this. Which way is it?
So, MSM8974 is the base chip. The APQ8074 is a board based on it with
the modem fused. So, apq8074 board compatible overrides the generic chip
compatible.
>
>> + interrupt-parent = <&intc>;
>> +
>> + soc: soc { };
> For files that include this it's ok to use the &phandle syntax, but in this
> base dtsi, please use proper structure. In other words, move the contents of
> the soc node up above instead.
Will do.
>
>> +};
>> +
>> +&soc {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> + compatible = "simple-bus";
>> +
>> + intc: interrupt-controller@f9000000 {
>> + compatible = "qcom,msm-qgic2";
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> + reg = <0xf9000000 0x1000>,
>> + <0xf9002000 0x1000>;
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv7-timer";
>> + interrupts = <1 2 0xf08>,
>> + <1 3 0xf08>,
>> + <1 4 0xf08>,
>> + <1 1 0xf08>;
>> + clock-frequency = <19200000>;
>> + };
>> +};
> It'd make a lot of sense to include at least cpu nodes here as well, and
> ideally basics for the drivers you have already merged, such as uarts.
Those are scheduled next as separate patches with some additional changes.
>
>> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
>> index 905efc8..499e8fe 100644
>> --- a/arch/arm/mach-msm/Kconfig
>> +++ b/arch/arm/mach-msm/Kconfig
>> @@ -1,12 +1,12 @@
>> if ARCH_MSM
>>
>> comment "Qualcomm MSM SoC Type"
>> - depends on (ARCH_MSM8X60 || ARCH_MSM8960)
>> + depends on ARCH_MSM_DT
>>
>> choice
>> prompt "Qualcomm MSM SoC Type"
>> default ARCH_MSM7X00A
>> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
>> + depends on !ARCH_MSM_DT
> This has nothing to do with adding support for dragonboard. Please break
> out the cleanup separately.
>
> I'm not sure what the purpose of ARCH_MSM_DT is either, it just looks to
> complicate matter here?
ARCH_MSM_DT is just a combined config to denote the targets that have DT
support instead of ORing the chip configs.
>> +config ARCH_MSM8974
>> + bool "MSM8974"
>> + select ARM_GIC
>> + select CPU_V7
>> + select HAVE_ARM_ARCH_TIMER
>> + select HAVE_SMP
>> + select MSM_SCM if SMP
>> + select USE_OF
>> +
>> +config ARCH_MSM_DT
>> + def_bool y
>> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
>> +
>> config MSM_HAS_DEBUG_UART_HS
>> bool
>>
>> @@ -68,6 +81,7 @@ config MSM_SOC_REV_A
>>
>> config ARCH_MSM_ARM11
>> bool
>> +
>> config ARCH_MSM_SCORPION
>> bool
>>
>> @@ -75,6 +89,7 @@ config MSM_VIC
>> bool
>>
>> menu "Qualcomm MSM Board Type"
>> + depends on !ARCH_MSM_DT
>>
>> config MACH_HALIBUT
>> depends on ARCH_MSM
>> @@ -122,6 +137,7 @@ config MSM_SMD
>>
>> config MSM_GPIOMUX
>> bool
>> + depends on !ARCH_MSM_DT
>> help
>> Support for MSM V1 TLMM GPIOMUX architecture.
>
> All of the above should be in a separate patch and motivated.
>
>>
>> diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
>> index d257ff4..80e3b15 100644
>> --- a/arch/arm/mach-msm/Makefile
>> +++ b/arch/arm/mach-msm/Makefile
>> @@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
>> obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
>> obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
>> obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
>> +obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
>> obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
>> obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
>> diff --git a/arch/arm/mach-msm/board-dt-8974.c b/arch/arm/mach-msm/board-dt-8974.c
>> new file mode 100644
>> index 0000000..01ed8d0
>> --- /dev/null
>> +++ b/arch/arm/mach-msm/board-dt-8974.c
>> @@ -0,0 +1,24 @@
>> +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/of_platform.h>
>> +#include <asm/mach/arch.h>
>> +
>> +static const char * const msm8974_dt_match[] __initconst = {
>> + "qcom,msm8974",
>> + "qcom,apq8074",
>> + NULL
>> +};
>> +
>> +DT_MACHINE_START(MSM8974_DT, "Qualcomm MSM (Flattened Device Tree)")
>> + .dt_compat = msm8974_dt_match,
>> +MACHINE_END
> This file should be shared across SoCs. You should avoid adding a new dt board
> file for every SoC like this.
Will club these changes with the ARCH_MSM_DT seperation and send that
out as a precursor patch to 8074 support.
>
> -Olof
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 17:48 ` Rohit Vaswani
0 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 17:48 UTC (permalink / raw)
To: linux-arm-kernel
On 9/6/2013 2:50 PM, Olof Johansson wrote:
> Hi,
>
> Some comments below.
>
> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>> This patch adds basic board support for APQ8074 Dragonboard
>> <snip>
>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>> - msm8960-cdp.dtb
>> + msm8960-cdp.dtb \
>> + apq8074-dragonboard.dtb
> Please add boards alphabetically.
Will do.
>
>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>> armada-370-mirabox.dtb \
>> armada-370-rd.dtb \
>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>> new file mode 100644
>> index 0000000..5b7b6a0
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
> family or vendor is used as a prefix to keep things a bit more organized. In
> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
Sure. But the board is called an APQ8074 and we wanted to keep the
naming consistent with that.
>> @@ -0,0 +1,6 @@
>> +/include/ "msm8974.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm APQ8074 Dragonboard";
>> + compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
> Ok, I'm all for merging a early minimal dts file, but things like memory and
> a default bootargs tend to make sense.
>
>> diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm MSM8974";
>> + compatible = "qcom,msm8974";
> the board uses "qcom,apq8074" and this overrides this. Which way is it?
So, MSM8974 is the base chip. The APQ8074 is a board based on it with
the modem fused. So, apq8074 board compatible overrides the generic chip
compatible.
>
>> + interrupt-parent = <&intc>;
>> +
>> + soc: soc { };
> For files that include this it's ok to use the &phandle syntax, but in this
> base dtsi, please use proper structure. In other words, move the contents of
> the soc node up above instead.
Will do.
>
>> +};
>> +
>> +&soc {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> + compatible = "simple-bus";
>> +
>> + intc: interrupt-controller at f9000000 {
>> + compatible = "qcom,msm-qgic2";
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> + reg = <0xf9000000 0x1000>,
>> + <0xf9002000 0x1000>;
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv7-timer";
>> + interrupts = <1 2 0xf08>,
>> + <1 3 0xf08>,
>> + <1 4 0xf08>,
>> + <1 1 0xf08>;
>> + clock-frequency = <19200000>;
>> + };
>> +};
> It'd make a lot of sense to include at least cpu nodes here as well, and
> ideally basics for the drivers you have already merged, such as uarts.
Those are scheduled next as separate patches with some additional changes.
>
>> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
>> index 905efc8..499e8fe 100644
>> --- a/arch/arm/mach-msm/Kconfig
>> +++ b/arch/arm/mach-msm/Kconfig
>> @@ -1,12 +1,12 @@
>> if ARCH_MSM
>>
>> comment "Qualcomm MSM SoC Type"
>> - depends on (ARCH_MSM8X60 || ARCH_MSM8960)
>> + depends on ARCH_MSM_DT
>>
>> choice
>> prompt "Qualcomm MSM SoC Type"
>> default ARCH_MSM7X00A
>> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
>> + depends on !ARCH_MSM_DT
> This has nothing to do with adding support for dragonboard. Please break
> out the cleanup separately.
>
> I'm not sure what the purpose of ARCH_MSM_DT is either, it just looks to
> complicate matter here?
ARCH_MSM_DT is just a combined config to denote the targets that have DT
support instead of ORing the chip configs.
>> +config ARCH_MSM8974
>> + bool "MSM8974"
>> + select ARM_GIC
>> + select CPU_V7
>> + select HAVE_ARM_ARCH_TIMER
>> + select HAVE_SMP
>> + select MSM_SCM if SMP
>> + select USE_OF
>> +
>> +config ARCH_MSM_DT
>> + def_bool y
>> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
>> +
>> config MSM_HAS_DEBUG_UART_HS
>> bool
>>
>> @@ -68,6 +81,7 @@ config MSM_SOC_REV_A
>>
>> config ARCH_MSM_ARM11
>> bool
>> +
>> config ARCH_MSM_SCORPION
>> bool
>>
>> @@ -75,6 +89,7 @@ config MSM_VIC
>> bool
>>
>> menu "Qualcomm MSM Board Type"
>> + depends on !ARCH_MSM_DT
>>
>> config MACH_HALIBUT
>> depends on ARCH_MSM
>> @@ -122,6 +137,7 @@ config MSM_SMD
>>
>> config MSM_GPIOMUX
>> bool
>> + depends on !ARCH_MSM_DT
>> help
>> Support for MSM V1 TLMM GPIOMUX architecture.
>
> All of the above should be in a separate patch and motivated.
>
>>
>> diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
>> index d257ff4..80e3b15 100644
>> --- a/arch/arm/mach-msm/Makefile
>> +++ b/arch/arm/mach-msm/Makefile
>> @@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
>> obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
>> obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
>> obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
>> +obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
>> obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
>> obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
>> diff --git a/arch/arm/mach-msm/board-dt-8974.c b/arch/arm/mach-msm/board-dt-8974.c
>> new file mode 100644
>> index 0000000..01ed8d0
>> --- /dev/null
>> +++ b/arch/arm/mach-msm/board-dt-8974.c
>> @@ -0,0 +1,24 @@
>> +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/of_platform.h>
>> +#include <asm/mach/arch.h>
>> +
>> +static const char * const msm8974_dt_match[] __initconst = {
>> + "qcom,msm8974",
>> + "qcom,apq8074",
>> + NULL
>> +};
>> +
>> +DT_MACHINE_START(MSM8974_DT, "Qualcomm MSM (Flattened Device Tree)")
>> + .dt_compat = msm8974_dt_match,
>> +MACHINE_END
> This file should be shared across SoCs. You should avoid adding a new dt board
> file for every SoC like this.
Will club these changes with the ARCH_MSM_DT seperation and send that
out as a precursor patch to 8074 support.
>
> -Olof
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 17:48 ` Rohit Vaswani
@ 2013-09-09 19:17 ` Kumar Gala
-1 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 19:17 UTC (permalink / raw)
To: Rohit Vaswani
Cc: Olof Johansson, David Brown, Rob Herring, Pawel Moll,
Mark Rutland, Stephen Warren, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>> Hi,
>>
>> Some comments below.
>>
>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>> This patch adds basic board support for APQ8074 Dragonboard
>>> <snip>
>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>> - msm8960-cdp.dtb
>>> + msm8960-cdp.dtb \
>>> + apq8074-dragonboard.dtb
>> Please add boards alphabetically.
> Will do.
>>
>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>> armada-370-mirabox.dtb \
>>> armada-370-rd.dtb \
>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>> new file mode 100644
>>> index 0000000..5b7b6a0
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>> family or vendor is used as a prefix to keep things a bit more organized. In
>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>
> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 19:17 ` Kumar Gala
0 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 19:17 UTC (permalink / raw)
To: linux-arm-kernel
On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>> Hi,
>>
>> Some comments below.
>>
>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>> This patch adds basic board support for APQ8074 Dragonboard
>>> <snip>
>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>> - msm8960-cdp.dtb
>>> + msm8960-cdp.dtb \
>>> + apq8074-dragonboard.dtb
>> Please add boards alphabetically.
> Will do.
>>
>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>> armada-370-mirabox.dtb \
>>> armada-370-rd.dtb \
>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>> new file mode 100644
>>> index 0000000..5b7b6a0
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>> family or vendor is used as a prefix to keep things a bit more organized. In
>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>
> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 19:17 ` Kumar Gala
@ 2013-09-09 19:29 ` Stephen Warren
-1 siblings, 0 replies; 32+ messages in thread
From: Stephen Warren @ 2013-09-09 19:29 UTC (permalink / raw)
To: Kumar Gala
Cc: Rohit Vaswani, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On 09/09/2013 01:17 PM, Kumar Gala wrote:
>
> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>
>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>> Hi,
>>>
>>> Some comments below.
>>>
>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>> <snip>
>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>> - msm8960-cdp.dtb
>>>> + msm8960-cdp.dtb \
>>>> + apq8074-dragonboard.dtb
>>> Please add boards alphabetically.
>> Will do.
>>>
>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>> armada-370-mirabox.dtb \
>>>> armada-370-rd.dtb \
>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>> new file mode 100644
>>>> index 0000000..5b7b6a0
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>
>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>
> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
U-Boot can easily calculate the DTB filename based on its soc/board
environment variables... Luckily in my case for Tegra, all the Tegra
chip names start with "Tegra", so we already sort all our DTB filenames
together in the directory listing:-)
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 19:29 ` Stephen Warren
0 siblings, 0 replies; 32+ messages in thread
From: Stephen Warren @ 2013-09-09 19:29 UTC (permalink / raw)
To: linux-arm-kernel
On 09/09/2013 01:17 PM, Kumar Gala wrote:
>
> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>
>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>> Hi,
>>>
>>> Some comments below.
>>>
>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>> <snip>
>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>> - msm8960-cdp.dtb
>>>> + msm8960-cdp.dtb \
>>>> + apq8074-dragonboard.dtb
>>> Please add boards alphabetically.
>> Will do.
>>>
>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>> armada-370-mirabox.dtb \
>>>> armada-370-rd.dtb \
>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>> new file mode 100644
>>>> index 0000000..5b7b6a0
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>
>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>
> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
U-Boot can easily calculate the DTB filename based on its soc/board
environment variables... Luckily in my case for Tegra, all the Tegra
chip names start with "Tegra", so we already sort all our DTB filenames
together in the directory listing:-)
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 19:29 ` Stephen Warren
@ 2013-09-09 19:48 ` Kumar Gala
-1 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 19:48 UTC (permalink / raw)
To: Stephen Warren
Cc: Rohit Vaswani, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>
>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>
>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>> Hi,
>>>>
>>>> Some comments below.
>>>>
>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>> <snip>
>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>> - msm8960-cdp.dtb
>>>>> + msm8960-cdp.dtb \
>>>>> + apq8074-dragonboard.dtb
>>>> Please add boards alphabetically.
>>> Will do.
>>>>
>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>> armada-370-mirabox.dtb \
>>>>> armada-370-rd.dtb \
>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>> new file mode 100644
>>>>> index 0000000..5b7b6a0
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>
>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>
>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>
> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
> U-Boot can easily calculate the DTB filename based on its soc/board
> environment variables... Luckily in my case for Tegra, all the Tegra
> chip names start with "Tegra", so we already sort all our DTB filenames
> together in the directory listing:-)
u-boot's not supported on MSM platforms, so not sure what purpose this serves.
we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
Not sure if we want to argue about {vendor} vs {sub-arch}.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 19:48 ` Kumar Gala
0 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 19:48 UTC (permalink / raw)
To: linux-arm-kernel
On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>
>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>
>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>> Hi,
>>>>
>>>> Some comments below.
>>>>
>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>> <snip>
>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>> - msm8960-cdp.dtb
>>>>> + msm8960-cdp.dtb \
>>>>> + apq8074-dragonboard.dtb
>>>> Please add boards alphabetically.
>>> Will do.
>>>>
>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>> armada-370-mirabox.dtb \
>>>>> armada-370-rd.dtb \
>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>> new file mode 100644
>>>>> index 0000000..5b7b6a0
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>
>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>
>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>
> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
> U-Boot can easily calculate the DTB filename based on its soc/board
> environment variables... Luckily in my case for Tegra, all the Tegra
> chip names start with "Tegra", so we already sort all our DTB filenames
> together in the directory listing:-)
u-boot's not supported on MSM platforms, so not sure what purpose this serves.
we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
Not sure if we want to argue about {vendor} vs {sub-arch}.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 19:48 ` Kumar Gala
@ 2013-09-09 21:21 ` Stephen Warren
-1 siblings, 0 replies; 32+ messages in thread
From: Stephen Warren @ 2013-09-09 21:21 UTC (permalink / raw)
To: Kumar Gala
Cc: Rohit Vaswani, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On 09/09/2013 01:48 PM, Kumar Gala wrote:
>
> On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
>
>> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>>
>>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>>
>>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>>> Hi,
>>>>>
>>>>> Some comments below.
>>>>>
>>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>> <snip>
>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>> - msm8960-cdp.dtb
>>>>>> + msm8960-cdp.dtb \
>>>>>> + apq8074-dragonboard.dtb
>>>>> Please add boards alphabetically.
>>>> Will do.
>>>>>
>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>> armada-370-mirabox.dtb \
>>>>>> armada-370-rd.dtb \
>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>> new file mode 100644
>>>>>> index 0000000..5b7b6a0
>>>>>> --- /dev/null
>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>
>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>
>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>>
>> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
>> U-Boot can easily calculate the DTB filename based on its soc/board
>> environment variables... Luckily in my case for Tegra, all the Tegra
>> chip names start with "Tegra", so we already sort all our DTB filenames
>> together in the directory listing:-)
>
> u-boot's not supported on MSM platforms, so not sure what purpose this serves.
Presumably that's just because nobody has ported the code; it could be
supported couldn't it?
> we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
That seems reasonable to me, although people will complain about the
files moving again. Perhaps it's worth doing that as part of the move of
*.dts out of the kernel?
> Not sure if we want to argue about {vendor} vs {sub-arch}.
sub-arch being the mach-xxx/plat-xxx directory? If so, I think that's a
Linux-ism that shouldn't affect the DT directory layout.
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 21:21 ` Stephen Warren
0 siblings, 0 replies; 32+ messages in thread
From: Stephen Warren @ 2013-09-09 21:21 UTC (permalink / raw)
To: linux-arm-kernel
On 09/09/2013 01:48 PM, Kumar Gala wrote:
>
> On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
>
>> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>>
>>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>>
>>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>>> Hi,
>>>>>
>>>>> Some comments below.
>>>>>
>>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>> <snip>
>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>> - msm8960-cdp.dtb
>>>>>> + msm8960-cdp.dtb \
>>>>>> + apq8074-dragonboard.dtb
>>>>> Please add boards alphabetically.
>>>> Will do.
>>>>>
>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>> armada-370-mirabox.dtb \
>>>>>> armada-370-rd.dtb \
>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>> new file mode 100644
>>>>>> index 0000000..5b7b6a0
>>>>>> --- /dev/null
>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>
>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>
>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>>
>> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
>> U-Boot can easily calculate the DTB filename based on its soc/board
>> environment variables... Luckily in my case for Tegra, all the Tegra
>> chip names start with "Tegra", so we already sort all our DTB filenames
>> together in the directory listing:-)
>
> u-boot's not supported on MSM platforms, so not sure what purpose this serves.
Presumably that's just because nobody has ported the code; it could be
supported couldn't it?
> we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
That seems reasonable to me, although people will complain about the
files moving again. Perhaps it's worth doing that as part of the move of
*.dts out of the kernel?
> Not sure if we want to argue about {vendor} vs {sub-arch}.
sub-arch being the mach-xxx/plat-xxx directory? If so, I think that's a
Linux-ism that shouldn't affect the DT directory layout.
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 21:21 ` Stephen Warren
@ 2013-09-09 21:25 ` Kumar Gala
-1 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 21:25 UTC (permalink / raw)
To: Stephen Warren
Cc: Rohit Vaswani, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On Sep 9, 2013, at 4:21 PM, Stephen Warren wrote:
> On 09/09/2013 01:48 PM, Kumar Gala wrote:
>>
>> On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
>>
>>> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>>>
>>>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>>>
>>>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>>>> Hi,
>>>>>>
>>>>>> Some comments below.
>>>>>>
>>>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>> <snip>
>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>> - msm8960-cdp.dtb
>>>>>>> + msm8960-cdp.dtb \
>>>>>>> + apq8074-dragonboard.dtb
>>>>>> Please add boards alphabetically.
>>>>> Will do.
>>>>>>
>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>> armada-370-mirabox.dtb \
>>>>>>> armada-370-rd.dtb \
>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>> new file mode 100644
>>>>>>> index 0000000..5b7b6a0
>>>>>>> --- /dev/null
>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>
>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>
>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>>>
>>> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
>>> U-Boot can easily calculate the DTB filename based on its soc/board
>>> environment variables... Luckily in my case for Tegra, all the Tegra
>>> chip names start with "Tegra", so we already sort all our DTB filenames
>>> together in the directory listing:-)
>>
>> u-boot's not supported on MSM platforms, so not sure what purpose this serves.
>
> Presumably that's just because nobody has ported the code; it could be
> supported couldn't it?
In theory.
>> we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
>
> That seems reasonable to me, although people will complain about the
> files moving again. Perhaps it's worth doing that as part of the move of
> *.dts out of the kernel?
Agreed, probably best since we'll probably be merging different arch dts's as well at that point
>> Not sure if we want to argue about {vendor} vs {sub-arch}.
>
> sub-arch being the mach-xxx/plat-xxx directory? If so, I think that's a
> Linux-ism that shouldn't affect the DT directory layout.
Yeah, the mach-xxx/plat-xxx dir, and agree that it being a Linux-ism we shouldn't apply to this.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 21:25 ` Kumar Gala
0 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 21:25 UTC (permalink / raw)
To: linux-arm-kernel
On Sep 9, 2013, at 4:21 PM, Stephen Warren wrote:
> On 09/09/2013 01:48 PM, Kumar Gala wrote:
>>
>> On Sep 9, 2013, at 2:29 PM, Stephen Warren wrote:
>>
>>> On 09/09/2013 01:17 PM, Kumar Gala wrote:
>>>>
>>>> On Sep 9, 2013, at 12:48 PM, Rohit Vaswani wrote:
>>>>
>>>>> On 9/6/2013 2:50 PM, Olof Johansson wrote:
>>>>>> Hi,
>>>>>>
>>>>>> Some comments below.
>>>>>>
>>>>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>> <snip>
>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>> - msm8960-cdp.dtb
>>>>>>> + msm8960-cdp.dtb \
>>>>>>> + apq8074-dragonboard.dtb
>>>>>> Please add boards alphabetically.
>>>>> Will do.
>>>>>>
>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>> armada-370-mirabox.dtb \
>>>>>>> armada-370-rd.dtb \
>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>> new file mode 100644
>>>>>>> index 0000000..5b7b6a0
>>>>>>> --- /dev/null
>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>
>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>
>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>>>
>>> Hmm. It'd be nice for the filenames to be ${soc}-${board} so that e.g.
>>> U-Boot can easily calculate the DTB filename based on its soc/board
>>> environment variables... Luckily in my case for Tegra, all the Tegra
>>> chip names start with "Tegra", so we already sort all our DTB filenames
>>> together in the directory listing:-)
>>
>> u-boot's not supported on MSM platforms, so not sure what purpose this serves.
>
> Presumably that's just because nobody has ported the code; it could be
> supported couldn't it?
In theory.
>> we might want to just introduce vendor dirs so its arch/arm/boot/dts/{vendor}/{soc}-{board}
>
> That seems reasonable to me, although people will complain about the
> files moving again. Perhaps it's worth doing that as part of the move of
> *.dts out of the kernel?
Agreed, probably best since we'll probably be merging different arch dts's as well at that point
>> Not sure if we want to argue about {vendor} vs {sub-arch}.
>
> sub-arch being the mach-xxx/plat-xxx directory? If so, I think that's a
> Linux-ism that shouldn't affect the DT directory layout.
Yeah, the mach-xxx/plat-xxx dir, and agree that it being a Linux-ism we shouldn't apply to this.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 21:25 ` Kumar Gala
@ 2013-09-09 21:42 ` Rohit Vaswani
-1 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 21:42 UTC (permalink / raw)
To: Kumar Gala
Cc: Stephen Warren, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On 9/9/2013 2:25 PM, Kumar Gala wrote:
> <snip>
> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>> <snip>
>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>> - msm8960-cdp.dtb
>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>> Please add boards alphabetically.
>>>>>> Will do.
>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>> armada-370-rd.dtb \
>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>> new file mode 100644
>>>>>>>> index 0000000..5b7b6a0
>>>>>>>> --- /dev/null
>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
Coming back to this, it would be better if the naming to be consistent
with what we call our ARCH - msm and not qcom.
msm8974-dragonboard signifies quite clearly what the board is.
>>>> <snip>
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 21:42 ` Rohit Vaswani
0 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 21:42 UTC (permalink / raw)
To: linux-arm-kernel
On 9/9/2013 2:25 PM, Kumar Gala wrote:
> <snip>
> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>> <snip>
>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>> - msm8960-cdp.dtb
>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>> Please add boards alphabetically.
>>>>>> Will do.
>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>> armada-370-rd.dtb \
>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>> new file mode 100644
>>>>>>>> index 0000000..5b7b6a0
>>>>>>>> --- /dev/null
>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
Coming back to this, it would be better if the naming to be consistent
with what we call our ARCH - msm and not qcom.
msm8974-dragonboard signifies quite clearly what the board is.
>>>> <snip>
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 21:42 ` Rohit Vaswani
@ 2013-09-09 22:04 ` Kumar Gala
-1 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 22:04 UTC (permalink / raw)
To: Rohit Vaswani
Cc: Stephen Warren, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On Sep 9, 2013, at 4:42 PM, Rohit Vaswani wrote:
> On 9/9/2013 2:25 PM, Kumar Gala wrote:
>> <snip>
>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>>> <snip>
>>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>>> - msm8960-cdp.dtb
>>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>>> Please add boards alphabetically.
>>>>>>> Will do.
>>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>>> armada-370-rd.dtb \
>>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>> new file mode 100644
>>>>>>>>> index 0000000..5b7b6a0
>>>>>>>>> --- /dev/null
>>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>
> Coming back to this, it would be better if the naming to be consistent with what we call our ARCH - msm and not qcom.
> msm8974-dragonboard signifies quite clearly what the board is.
I was saying qcom,apq8074-dragonboard or we can do the dir thing as we don't have that mean qcom/msm device trees.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 22:04 ` Kumar Gala
0 siblings, 0 replies; 32+ messages in thread
From: Kumar Gala @ 2013-09-09 22:04 UTC (permalink / raw)
To: linux-arm-kernel
On Sep 9, 2013, at 4:42 PM, Rohit Vaswani wrote:
> On 9/9/2013 2:25 PM, Kumar Gala wrote:
>> <snip>
>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>>> <snip>
>>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>>> - msm8960-cdp.dtb
>>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>>> Please add boards alphabetically.
>>>>>>> Will do.
>>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>>> armada-370-rd.dtb \
>>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>> new file mode 100644
>>>>>>>>> index 0000000..5b7b6a0
>>>>>>>>> --- /dev/null
>>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>
> Coming back to this, it would be better if the naming to be consistent with what we call our ARCH - msm and not qcom.
> msm8974-dragonboard signifies quite clearly what the board is.
I was saying qcom,apq8074-dragonboard or we can do the dir thing as we don't have that mean qcom/msm device trees.
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
2013-09-09 22:04 ` Kumar Gala
@ 2013-09-09 22:30 ` Rohit Vaswani
-1 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 22:30 UTC (permalink / raw)
To: Kumar Gala
Cc: Stephen Warren, Olof Johansson, David Brown, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Russell King,
Daniel Walker, Bryan Huntsman, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-msm
On 9/9/2013 3:04 PM, Kumar Gala wrote:
> On Sep 9, 2013, at 4:42 PM, Rohit Vaswani wrote:
>
>> On 9/9/2013 2:25 PM, Kumar Gala wrote:
>>> <snip>
>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>>>> <snip>
>>>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>>>> - msm8960-cdp.dtb
>>>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>>>> Please add boards alphabetically.
>>>>>>>> Will do.
>>>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>>>> armada-370-rd.dtb \
>>>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>>> new file mode 100644
>>>>>>>>>> index 0000000..5b7b6a0
>>>>>>>>>> --- /dev/null
>>>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>> Coming back to this, it would be better if the naming to be consistent with what we call our ARCH - msm and not qcom.
>> msm8974-dragonboard signifies quite clearly what the board is.
> I was saying qcom,apq8074-dragonboard or we can do the dir thing as we don't have that mean qcom/msm device trees.
>
> - k
Sure, that's fine. If there's a consensus on the name to match the
compatible strings, could you send a patch out to rename the older
dtsi's and I can add the Dragonboard support with it.
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCHv3 1/2] ARM: msm: Add support for APQ8074 Dragonboard
@ 2013-09-09 22:30 ` Rohit Vaswani
0 siblings, 0 replies; 32+ messages in thread
From: Rohit Vaswani @ 2013-09-09 22:30 UTC (permalink / raw)
To: linux-arm-kernel
On 9/9/2013 3:04 PM, Kumar Gala wrote:
> On Sep 9, 2013, at 4:42 PM, Rohit Vaswani wrote:
>
>> On 9/9/2013 2:25 PM, Kumar Gala wrote:
>>> <snip>
>>> On Fri, Sep 06, 2013 at 12:32:22PM -0700, Rohit Vaswani wrote:
>>>>>>>>>> This patch adds basic board support for APQ8074 Dragonboard
>>>>>>>>>> <snip>
>>>>>>>>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>>>>>>>>> - msm8960-cdp.dtb
>>>>>>>>>> + msm8960-cdp.dtb \
>>>>>>>>>> + apq8074-dragonboard.dtb
>>>>>>>>> Please add boards alphabetically.
>>>>>>>> Will do.
>>>>>>>>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>>>>>>>>> armada-370-mirabox.dtb \
>>>>>>>>>> armada-370-rd.dtb \
>>>>>>>>>> diff --git a/arch/arm/boot/dts/apq8074-dragonboard.dts b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>>> new file mode 100644
>>>>>>>>>> index 0000000..5b7b6a0
>>>>>>>>>> --- /dev/null
>>>>>>>>>> +++ b/arch/arm/boot/dts/apq8074-dragonboard.dts
>>>>>>>>> arch/arm/boot/dts/ is getting really crowded. It's been working best if the SoC
>>>>>>>>> family or vendor is used as a prefix to keep things a bit more organized. In
>>>>>>>>> that spirit, prefixing these with msm-<foo> makes sense. Can you please do so?
>>>>>>>> Sure. But the board is called an APQ8074 and we wanted to keep the naming consistent with that.
>>>>>>> If we do this we should use qcom, not msm as the prefix. Match the device tree vendor prefix.
>> Coming back to this, it would be better if the naming to be consistent with what we call our ARCH - msm and not qcom.
>> msm8974-dragonboard signifies quite clearly what the board is.
> I was saying qcom,apq8074-dragonboard or we can do the dir thing as we don't have that mean qcom/msm device trees.
>
> - k
Sure, that's fine. If there's a consensus on the name to match the
compatible strings, could you send a patch out to rename the older
dtsi's and I can add the Dragonboard support with it.
Thanks,
Rohit Vaswani
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 32+ messages in thread