[Qemu-devel] [PATCH for-1.7 v2 2/8] hw/alpha: limit iommu-typhoon memory size

[Marcel Apfelbaum <marcel.a@redhat.com>]

The page table logic in exec.c assumes
that memory addresses are at most TARGET_PHYS_ADDR_SPACE_BITS.
Limit iommu-typhoon accordingly.

Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
---
 hw/alpha/typhoon.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 59e1bb8..ba88dd9 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -888,7 +888,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
 
     /* Host memory as seen from the PCI side, via the IOMMU.  */
     memory_region_init_iommu(&s->pchip.iommu, OBJECT(s), &typhoon_iommu_ops,
-                             "iommu-typhoon", UINT64_MAX);
+                             "iommu-typhoon", TARGET_PHYS_ADDR_SPACE_MAX);
     address_space_init(&s->pchip.iommu_as, &s->pchip.iommu, "pchip0-pci");
     pci_setup_iommu(b, typhoon_pci_dma_iommu, s);
 
-- 
1.8.3.1