From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 10/13] drm/i915: gather backlight information at setup Date: Wed, 13 Nov 2013 19:01:39 +0200 Message-ID: <1384362099.25182.85.camel@intelbox> References: <9a3300d34d07703dec0a1ad076a4ecf57efa80b6.1383920621.git.jani.nikula@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1470983864==" Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 2276DFB1BD for ; Wed, 13 Nov 2013 09:01:51 -0800 (PST) In-Reply-To: <9a3300d34d07703dec0a1ad076a4ecf57efa80b6.1383920621.git.jani.nikula@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1470983864== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-OgNrNkSVc2p59W4uKml/" --=-OgNrNkSVc2p59W4uKml/ Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2013-11-08 at 16:49 +0200, Jani Nikula wrote: > Prepare for being able to use the information at enable. >=20 > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_drv.h | 2 ++ > drivers/gpu/drm/i915/intel_panel.c | 68 +++++++++++++++++++++++++++++-= ------ > 2 files changed, 58 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 7384a7b..6f2bc82 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -163,6 +163,8 @@ struct intel_panel { > u32 level; > u32 max; > bool enabled; > + bool combination_mode; /* gen 2/4 only */ > + bool active_low_pwm; > struct backlight_device *device; > } backlight; > }; > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/in= tel_panel.c > index 3dd9f57d..0e8f0a3 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -490,13 +490,14 @@ static u32 i9xx_get_backlight(struct intel_connecto= r *connector) > { > struct drm_device *dev =3D connector->base.dev; > struct drm_i915_private *dev_priv =3D dev->dev_private; > + struct intel_panel *panel =3D &connector->panel; > u32 val; > =20 > val =3D I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; > if (INTEL_INFO(dev)->gen < 4) > val >>=3D 1; > =20 > - if (is_backlight_combination_mode(dev)) { > + if (panel->backlight.combination_mode) { > u8 lbpc; > =20 > pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); > @@ -558,7 +559,7 @@ static void i9xx_set_backlight(struct intel_connector= *connector, u32 level) > =20 > WARN_ON(panel->backlight.max =3D=3D 0); > =20 > - if (is_backlight_combination_mode(dev)) { > + if (panel->backlight.combination_mode) { > u8 lbpc; > =20 > lbpc =3D level * 0xfe / panel->backlight.max + 1; > @@ -966,46 +967,84 @@ static void intel_backlight_device_unregister(struc= t intel_connector *connector) > */ > static int pch_setup_backlight(struct intel_connector *connector) > { > + struct drm_device *dev =3D connector->base.dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > - u32 val; > + u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; > =20 > - panel->backlight.max =3D pch_get_max_backlight(connector); > + pch_ctl1 =3D I915_READ(BLC_PWM_PCH_CTL1); > + panel->backlight.active_low_pwm =3D pch_ctl1 & BLM_PCH_POLARITY; > + > + pch_ctl2 =3D I915_READ(BLC_PWM_PCH_CTL2); > + panel->backlight.max =3D pch_ctl2 >> 16; > if (!panel->backlight.max) > return -ENODEV; > =20 > val =3D pch_get_backlight(connector); > panel->backlight.level =3D intel_panel_compute_brightness(connector, va= l); > =20 > + cpu_ctl2 =3D I915_READ(BLC_PWM_CPU_CTL2); > + panel->backlight.enabled =3D (cpu_ctl2 & BLM_PWM_ENABLE) && > + (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level !=3D 0; Don't we need to check here for QUIRK_NO_PCH_PWM_ENABLE? --Imre > + > return 0; > } > =20 > static int i9xx_setup_backlight(struct intel_connector *connector) > { > + struct drm_device *dev =3D connector->base.dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > - u32 val; > + u32 ctl, val; > + > + ctl =3D I915_READ(BLC_PWM_CTL); > + > + if (IS_GEN2(dev)) > + panel->backlight.combination_mode =3D ctl & BLM_LEGACY_MODE; > + > + if (IS_PINEVIEW(dev)) > + panel->backlight.active_low_pwm =3D ctl & BLM_POLARITY_PNV; > + > + panel->backlight.max =3D ctl >> 17; > + if (panel->backlight.combination_mode) > + panel->backlight.max *=3D 0xff; > =20 > - panel->backlight.max =3D i9xx_get_max_backlight(connector); > if (!panel->backlight.max) > return -ENODEV; > =20 > val =3D i9xx_get_backlight(connector); > panel->backlight.level =3D intel_panel_compute_brightness(connector, va= l); > =20 > + panel->backlight.enabled =3D panel->backlight.level !=3D 0; > + > return 0; > } > =20 > static int i965_setup_backlight(struct intel_connector *connector) > { > + struct drm_device *dev =3D connector->base.dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > - u32 val; > + u32 ctl, ctl2, val; > + > + ctl2 =3D I915_READ(BLC_PWM_CTL2); > + panel->backlight.combination_mode =3D ctl2 & BLM_COMBINATION_MODE; > + panel->backlight.active_low_pwm =3D ctl2 & BLM_POLARITY_I965; > + > + ctl =3D I915_READ(BLC_PWM_CTL); > + panel->backlight.max =3D ctl >> 16; > + if (panel->backlight.combination_mode) > + panel->backlight.max *=3D 0xff; > =20 > - panel->backlight.max =3D i965_get_max_backlight(connector); > if (!panel->backlight.max) > return -ENODEV; > =20 > val =3D i9xx_get_backlight(connector); > panel->backlight.level =3D intel_panel_compute_brightness(connector, va= l); > =20 > + panel->backlight.enabled =3D (ctl2 & BLM_PWM_ENABLE) && > + panel->backlight.level !=3D 0; > + > return 0; > } > =20 > @@ -1015,7 +1054,7 @@ static int vlv_setup_backlight(struct intel_connect= or *connector) > struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > enum pipe pipe; > - u32 val; > + u32 ctl, ctl2, val; > =20 > for_each_pipe(pipe) { > u32 cur_val =3D I915_READ(VLV_BLC_PWM_CTL(pipe)); > @@ -1029,13 +1068,20 @@ static int vlv_setup_backlight(struct intel_conne= ctor *connector) > cur_val); > } > =20 > - panel->backlight.max =3D _vlv_get_max_backlight(dev, PIPE_A); > + ctl2 =3D I915_READ(VLV_BLC_PWM_CTL2(PIPE_A)); > + panel->backlight.active_low_pwm =3D ctl2 & BLM_POLARITY_I965; > + > + ctl =3D I915_READ(VLV_BLC_PWM_CTL(PIPE_A)); > + panel->backlight.max =3D ctl >> 16; > if (!panel->backlight.max) > return -ENODEV; > =20 > val =3D _vlv_get_backlight(dev, PIPE_A); > panel->backlight.level =3D intel_panel_compute_brightness(connector, va= l); > =20 > + panel->backlight.enabled =3D (ctl2 & BLM_PWM_ENABLE) && > + panel->backlight.level !=3D 0; > + > return 0; > } > =20 > @@ -1059,8 +1105,6 @@ int intel_panel_setup_backlight(struct drm_connecto= r *connector) > return ret; > } > =20 > - panel->backlight.enabled =3D panel->backlight.level !=3D 0; > - > intel_backlight_device_register(intel_connector); > =20 > panel->backlight.present =3D true; --=-OgNrNkSVc2p59W4uKml/ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJSg7BzAAoJEORIIAnNuWDFyycH/iGnSC0Ps8fD6sSin3xYSN2G gmYWFYYWSFOTK7BPbNt3+o7Ea2Qbsf6V+GOxY09OlpE54fGCXoRcDD2VXkP7ewhX xKAPR7gv3MoeAyhsmE734ZpBpK0vGLGbhis3+tStE7IgsSRDpbGhKIodtZqIiyZq 3A7fBLmbQjgCahBo4JHp6kFN+5gi2z133Pr+PoQ/vQUspIdHfQE49Oaslmme3qVg u4+dJxqYyzRt0db/6ORNJbpimF1bFU2xBoO1Ew8PUgK9q5t5qXUJysE3ulX2OFKC bl8Rvu7WhqAVYBHOtoEtctmp+N9EMiVz+160oi/7k7aXveywb3aqrZY3vItUU+U= =k2M6 -----END PGP SIGNATURE----- --=-OgNrNkSVc2p59W4uKml/-- --===============1470983864== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1470983864==--