From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 11/13] drm/i915: do full backlight setup at enable time Date: Wed, 13 Nov 2013 19:53:52 +0200 Message-ID: <1384365232.25182.90.camel@intelbox> References: Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0981581477==" Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 99015FB1F2 for ; Wed, 13 Nov 2013 09:53:56 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0981581477== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-wIX1HBNBG+JO0tEyGOmH" --=-wIX1HBNBG+JO0tEyGOmH Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2013-11-08 at 16:49 +0200, Jani Nikula wrote: > We should now have all the information we need to do a full > initialization of the backlight registers. >=20 > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_panel.c | 145 ++++++++++++++++++++++--------= ------ > 1 file changed, 89 insertions(+), 56 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/in= tel_panel.c > index 0e8f0a3..da088e3 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -719,50 +719,71 @@ static void pch_enable_backlight(struct intel_conne= ctor *connector) > enum pipe pipe =3D intel_get_pipe_from_connector(connector); > enum transcoder cpu_transcoder =3D > intel_pipe_to_cpu_transcoder(dev_priv, pipe); > - u32 tmp; > - > - tmp =3D I915_READ(BLC_PWM_CPU_CTL2); > + u32 cpu_ctl2, pch_ctl1, pch_ctl2; > =20 > - /* Note that this can also get called through dpms changes. And > - * we don't track the backlight dpms state, hence check whether > - * we have to do anything first. */ > - if (tmp & BLM_PWM_ENABLE) > - return; > + cpu_ctl2 =3D I915_READ(BLC_PWM_CPU_CTL2); > + if (cpu_ctl2 & BLM_PWM_ENABLE) { > + WARN(1, "cpu backlight already enabled\n"); > + cpu_ctl2 &=3D ~BLM_PWM_ENABLE; > + I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); > + } > =20 > - if (INTEL_INFO(dev)->num_pipes =3D=3D 3) > - tmp &=3D ~BLM_PIPE_SELECT_IVB; > - else > - tmp &=3D ~BLM_PIPE_SELECT; > + pch_ctl1 =3D I915_READ(BLC_PWM_PCH_CTL1); > + if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { > + DRM_DEBUG_KMS("pch backlight already enabled\n"); > + pch_ctl1 &=3D ~BLM_PCH_PWM_ENABLE; > + I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); > + } > =20 > if (cpu_transcoder =3D=3D TRANSCODER_EDP) > - tmp |=3D BLM_TRANSCODER_EDP; > + cpu_ctl2 =3D BLM_TRANSCODER_EDP; > else > - tmp |=3D BLM_PIPE(cpu_transcoder); > - tmp &=3D ~BLM_PWM_ENABLE; > - > - I915_WRITE(BLC_PWM_CPU_CTL2, tmp); > + cpu_ctl2 =3D BLM_PIPE(cpu_transcoder); > + I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); > POSTING_READ(BLC_PWM_CPU_CTL2); > - I915_WRITE(BLC_PWM_CPU_CTL2, tmp | BLM_PWM_ENABLE); > - > - if (!(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) { > - tmp =3D I915_READ(BLC_PWM_PCH_CTL1); > - tmp |=3D BLM_PCH_PWM_ENABLE; > - tmp &=3D ~BLM_PCH_OVERRIDE_ENABLE; > - I915_WRITE(BLC_PWM_PCH_CTL1, tmp); > - } Like in the previous patch, why is this removed? If the w/a is not needed any more it should be a separate patch. > + I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); > =20 > - /* > - * Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1. > - * BLC_PWM_CPU_CTL may be cleared to zero automatically when these > - * registers are set. > - */ > + /* This won't stick until the above enable. */ > intel_panel_actually_set_backlight(connector, panel->backlight.level); > + > + pch_ctl2 =3D panel->backlight.max << 16; > + I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); > + > + pch_ctl1 =3D 0; > + if (panel->backlight.active_low_pwm) > + pch_ctl1 |=3D BLM_PCH_POLARITY; > + I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); > + POSTING_READ(BLC_PWM_PCH_CTL1); > + I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); > } > =20 > static void i9xx_enable_backlight(struct intel_connector *connector) > { > + struct drm_device *dev =3D connector->base.dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > + u32 ctl, freq; > =20 > + ctl =3D I915_READ(BLC_PWM_CTL); > + if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { > + WARN(1, "backlight already enabled\n"); > + I915_WRITE(BLC_PWM_CTL, 0); > + } > + > + freq =3D panel->backlight.max; > + if (panel->backlight.combination_mode) > + freq /=3D 0xff; > + > + ctl =3D freq << 17; > + if (IS_GEN2(dev) && panel->backlight.combination_mode) > + ctl |=3D BLM_LEGACY_MODE; > + if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) > + ctl |=3D BLM_POLARITY_PNV; > + > + I915_WRITE(BLC_PWM_CTL, ctl); > + POSTING_READ(BLC_PWM_CTL); > + > + /* XXX: combine this into above write? */ > intel_panel_actually_set_backlight(connector, panel->backlight.level); > } > =20 > @@ -772,25 +793,33 @@ static void i965_enable_backlight(struct intel_conn= ector *connector) > struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > enum pipe pipe =3D intel_get_pipe_from_connector(connector); > - u32 tmp; > - > - tmp =3D I915_READ(BLC_PWM_CTL2); > + u32 ctl, ctl2, freq; > =20 > - /* Note that this can also get called through dpms changes. And > - * we don't track the backlight dpms state, hence check whether > - * we have to do anything first. */ > - if (tmp & BLM_PWM_ENABLE) > - return; > + ctl2 =3D I915_READ(BLC_PWM_CTL2); > + if (ctl2 & BLM_PWM_ENABLE) { > + WARN(1, "backlight already enabled\n"); > + ctl2 &=3D ~BLM_PWM_ENABLE; > + I915_WRITE(BLC_PWM_CTL2, ctl2); > + } > =20 > - tmp &=3D ~BLM_PIPE_SELECT; > - tmp |=3D BLM_PIPE(pipe); > - tmp &=3D ~BLM_PWM_ENABLE; > + freq =3D panel->backlight.max; > + if (panel->backlight.combination_mode) > + freq /=3D 0xff; > =20 > - I915_WRITE(BLC_PWM_CTL2, tmp); > - POSTING_READ(BLC_PWM_CTL2); > - I915_WRITE(BLC_PWM_CTL2, tmp | BLM_PWM_ENABLE); > + ctl =3D freq << 16; > + I915_WRITE(BLC_PWM_CTL, ctl); > =20 > + /* XXX: combine this into above write? */ > intel_panel_actually_set_backlight(connector, panel->backlight.level); > + > + ctl2 =3D BLM_PIPE(pipe); > + if (panel->backlight.combination_mode) > + ctl2 |=3D BLM_COMBINATION_MODE; > + if (panel->backlight.active_low_pwm) > + ctl2 |=3D BLM_POLARITY_I965; > + I915_WRITE(BLC_PWM_CTL2, ctl2); > + POSTING_READ(BLC_PWM_CTL2); > + I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); > } > =20 > static void vlv_enable_backlight(struct intel_connector *connector) > @@ -799,23 +828,27 @@ static void vlv_enable_backlight(struct intel_conne= ctor *connector) > struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_panel *panel =3D &connector->panel; > enum pipe pipe =3D intel_get_pipe_from_connector(connector); > - u32 tmp; > + u32 ctl, ctl2; > =20 > - tmp =3D I915_READ(VLV_BLC_PWM_CTL2(pipe)); > + ctl2 =3D I915_READ(VLV_BLC_PWM_CTL2(pipe)); > + if (ctl2 & BLM_PWM_ENABLE) { > + WARN(1, "backlight already enabled\n"); > + ctl2 &=3D ~BLM_PWM_ENABLE; > + I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); > + } > =20 > - /* Note that this can also get called through dpms changes. And > - * we don't track the backlight dpms state, hence check whether > - * we have to do anything first. */ > - if (tmp & BLM_PWM_ENABLE) > - return; > + ctl =3D panel->backlight.max << 16; > + I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); > =20 > - tmp &=3D ~BLM_PWM_ENABLE; > + /* XXX: combine this into above write? */ > + intel_panel_actually_set_backlight(connector, panel->backlight.level); > =20 > - I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp); > + ctl2 =3D 0; > + if (panel->backlight.active_low_pwm) > + ctl2 |=3D BLM_POLARITY_I965; > + I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); > POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); > - I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp | BLM_PWM_ENABLE); > - > - intel_panel_actually_set_backlight(connector, panel->backlight.level); > + I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); > } > =20 > void intel_panel_enable_backlight(struct intel_connector *connector) --=-wIX1HBNBG+JO0tEyGOmH Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJSg7ywAAoJEORIIAnNuWDFtHkIAPKnD1gLM+aPVpnqxraD8BJ5 4VXdPqQxNaMrgZaYHtyHPOcg3iPDVbX07xVML8/UfebjiXueUWY23rlB3qklx04F ntbXRzc6LTgQQnWdphgJ5NMIOApebFchiPNfvx+JGIAgIckGvMHNZ+/93qZ++FNx I/mAaZqpw3plZ4bViSKLi/1MFUkvyGEB2+KeD0boMRDLn71hB+1OOKw3IimS8GDZ 3YDLow4qlAd9/f/DGLqRa/SBrHOtqSESdih8zaL7kAMVBpB0jq5bw/kv+vDnsYTr Zo/s9DEDovwLjzr2pmTeL3L4jXziI0tHTmjPIENphlPdgIK5XzmLvw4S4cEieN4= =BJMW -----END PGP SIGNATURE----- --=-wIX1HBNBG+JO0tEyGOmH-- --===============0981581477== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0981581477==--