From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 43/48] drm/i915: Warn on gem_pin usage Date: Fri, 6 Dec 2013 14:11:28 -0800 Message-ID: <1386367941-7131-43-git-send-email-benjamin.widawsky@intel.com> References: <20131206215521.GA6922@bwidawsk.net> <1386367941-7131-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A20EFAA5C for ; Fri, 6 Dec 2013 14:15:34 -0800 (PST) In-Reply-To: <1386367941-7131-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Intel GFX Cc: Ben Widawsky , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org The pin IOCTL is leftover from the days of yore. It allows you to take a buffer, pin it, and receive the offset of that buffer. The IOCTL does not support the newer notion of contexts and VM, and therefore is not suitable for modern usage. The unsolvable problem is, "which address space do I pin this in?" As there are still mechanisms to do things only with the GGTT, and this could potentially have benefit as workarounds, leave it in place, but provide a warning to users. Request-to-not-deprecate-by: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f7114ae..a03c262 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3950,6 +3950,8 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data, goto out; } + if (USES_FULL_PPGTT(dev)) + DRM_DEBUG_DRIVER("Pinning with full PPGTT is not recommended\n"); obj->user_pin_count++; obj->pin_filp = file; -- 1.8.4.2