From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ian Campbell <Ian.Campbell@citrix.com>
Subject: Re: [PATCH v2] tools: libxc: flush data cache after
 loading images into guest memory
Date: Thu, 12 Dec 2013 17:33:39 +0000
Message-ID: <1386869619.20076.23.camel@kazak.uk.xensource.com>
References: <1386850863-16373-1-git-send-email-ian.campbell@citrix.com>
	<1386858199-18882-1-git-send-email-ian.campbell@citrix.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xen.org>
In-Reply-To: <1386858199-18882-1-git-send-email-ian.campbell@citrix.com>
List-Unsubscribe: <http://lists.xen.org/cgi-bin/mailman/options/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xen.org>
List-Help: <mailto:xen-devel-request@lists.xen.org?subject=help>
List-Subscribe: <http://lists.xen.org/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=subscribe>
Sender: xen-devel-bounces@lists.xen.org
Errors-To: xen-devel-bounces@lists.xen.org
To: xen-devel@lists.xen.org, Ian Jackson <Ian.Jackson@eu.citrix.com>
Cc: Andre Przywara <andre.przywara@calxeda.com>, stefano.stabellini@eu.citrix.com, julien.grall@linaro.org, tim@xen.org, Anup Patel <apatel@apm.com>, Pranavkumar Sawargaonkar <psawargaonkar@apm.com>
List-Id: xen-devel@lists.xenproject.org

On Thu, 2013-12-12 at 14:23 +0000, Ian Campbell wrote:
> +#elif defined(__aarch64__)
> +    unsigned long start = (unsigned long)ptr;
> +    unsigned long end = start + nr;
> +    unsigned long p, ctr;
> +    int stride;
> +
> +    /* Flush cache using direct DC CVAC instructions. This is
> +     * available to EL0 when SCTLR_EL1.UCI is set, which Linux does.
> +     *
> +     * Bits 19:16 of CTR_EL0 are log2 of the minimum dcache line size
> +     * in words, which we use as our stride length. This is readable
> +     * with SCTLR_EL1.UCT is set, which Linux does.
> +     */
> +    asm volatile ("mrs %0, ctr_el0" : "=r" (ctr));
> +
> +    stride = 4 * (1 << ((ctr & 0xf0000UL) >> 16));
> +
> +    for ( p = start ; p < end ; p += stride )
> +        asm volatile ("dc cvac, %0" :  : "r" (p));

I wonder if I need a dsb here. I suspect I do.

Ian.