From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9JrL-0006lI-1e for qemu-devel@nongnu.org; Fri, 31 Jan 2014 14:34:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W9Jr8-0005tF-3E for qemu-devel@nongnu.org; Fri, 31 Jan 2014 14:34:38 -0500 From: Tom Musta Date: Fri, 31 Jan 2014 13:33:59 -0600 Message-Id: <1391196846-12188-3-git-send-email-tommusta@gmail.com> In-Reply-To: <1391196846-12188-1-git-send-email-tommusta@gmail.com> References: <1391196846-12188-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [V2 PATCH 2/9] target-ppc: Add Target Address SPR (TAR) to Power8 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tom Musta , qemu-ppc@nongnu.org This patch adds support for the Target Address Register (TAR) to the Power8 model. Because supported SPRs are typically identified in an init_proc_*() function and because the Power8 model is currently just using the init_proc_POWER7() function, a new init_proc_POWER8() function is added and plugged into the P8 model. Signed-off-by: Tom Musta --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 14 +++++++++++++- 2 files changed, 14 insertions(+), 1 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index b9d6b10..810cf6a 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1508,6 +1508,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_RCPU_L2U_RA2 (0x32A) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) +#define SPR_TAR (0x32F) #define SPR_440_INV0 (0x370) #define SPR_440_INV1 (0x371) #define SPR_440_INV2 (0x372) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 62bb200..9dd6684 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7301,6 +7301,18 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data) pcc->l1_icache_size = 0x8000; } +static void init_proc_POWER8(CPUPPCState *env) +{ + /* inherit P7 */ + init_proc_POWER7(env); + + /* P8 supports the TAR */ + spr_register(env, SPR_TAR, "TAR", + &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic, + 0x00000000); +} + POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -7310,7 +7322,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) dc->desc = "POWER8"; pcc->pvr = CPU_POWERPC_POWER8_BASE; pcc->pvr_mask = CPU_POWERPC_POWER8_MASK; - pcc->init_proc = init_proc_POWER7; + pcc->init_proc = init_proc_POWER8; pcc->check_pow = check_pow_nocheck; pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | -- 1.7.1