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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V2 PATCH 4/9] target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions
Date: Fri, 31 Jan 2014 13:34:01 -0600	[thread overview]
Message-ID: <1391196846-12188-5-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1391196846-12188-1-git-send-email-tommusta@gmail.com>

This patch adds a flag to identify the load/store quadword instructions
that are introduced with Power ISA 2.07.

The flag is added to the Power8 model since P8 supports these
instructions.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/cpu.h            |    4 +++-
 target-ppc/translate_init.c |    3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 810cf6a..b66dd44 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1890,12 +1890,14 @@ enum {
     PPC2_FP_TST_ISA206 = 0x0000000000000800ULL,
     /* ISA 2.07 bctar instruction                                            */
     PPC2_BCTAR_ISA207  = 0x0000000000001000ULL,
+    /* ISA 2.07 load/store quadword                                          */
+    PPC2_LSQ_ISA207    = 0x0000000000002000ULL,
 
 #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
                         PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
                         PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
                         PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
-                        PPC2_BCTAR_ISA207)
+                        PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207)
 };
 
 /*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 9dd6684..886238a 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7339,7 +7339,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
     pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
                         PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
                         PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
-                        PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207;
+                        PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
+                        PPC2_LSQ_ISA207;
     pcc->msr_mask = 0x800000000284FF36ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
-- 
1.7.1

  parent reply	other threads:[~2014-01-31 19:34 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-31 19:33 [Qemu-devel] [V2 PATCH 0/9] target-ppc: Base ISA V2.07 for Power8 Tom Musta
2014-01-31 19:33 ` [Qemu-devel] [V2 PATCH 1/9] target-ppc: Add Flag for bctar Tom Musta
2014-01-31 19:33 ` [Qemu-devel] [V2 PATCH 2/9] target-ppc: Add Target Address SPR (TAR) to Power8 Tom Musta
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 3/9] target-ppc: Add bctar Instruction Tom Musta
2014-01-31 19:34 ` Tom Musta [this message]
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 5/9] target-ppc: Add is_user_mode Utility Routine Tom Musta
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 6/9] target-ppc: Load Quadword Tom Musta
2014-02-05  9:43   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-02-05 16:12     ` Tom Musta
2014-02-05 16:27       ` Eric Blake
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 7/9] target-ppc: Store Quadword Tom Musta
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 8/9] target-ppc: Add Load Quadword and Reserve Tom Musta
2014-01-31 19:34 ` [Qemu-devel] [V2 PATCH 9/9] target-ppc: Add Store Quadword Conditional Tom Musta
2014-02-05  9:48   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-02-05 16:14     ` Tom Musta

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