* [PATCH 00/11] ARM: shmobile: MSIOF integration on r8a7790/lager and r8a7791/koelsch
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
This patch series integrates support for the MSIOF module in the Renesas
R-Car H2 (r8a7790) and M2 (r8a7791) SoCs on the Lager and Koelsch
development boards.
It was tested on Lager and Koelsch, both legacy and DT, using a dummy
driver for the Renesas r2a11302ft PMIC that reads out the PMIC's version
ID.
[01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
[02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
[03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
[04/11] ARM: shmobile: lager legacy: Add MSIOF support
[05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
[06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add
spi0 alias
[07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add
spi0 alias
[08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
[09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
[10/11] ARM: shmobile: lager dts: Add MSIOF nodes
[11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 00/11] ARM: shmobile: MSIOF integration on r8a7790/lager and r8a7791/koelsch
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm; +Cc: linux-sh, linux-arm-kernel, linux-kernel
Hi Simon, Magnus,
This patch series integrates support for the MSIOF module in the Renesas
R-Car H2 (r8a7790) and M2 (r8a7791) SoCs on the Lager and Koelsch
development boards.
It was tested on Lager and Koelsch, both legacy and DT, using a dummy
driver for the Renesas r2a11302ft PMIC that reads out the PMIC's version
ID.
[01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
[02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
[03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
[04/11] ARM: shmobile: lager legacy: Add MSIOF support
[05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
[06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add
spi0 alias
[07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add
spi0 alias
[08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
[09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
[10/11] ARM: shmobile: lager dts: Add MSIOF nodes
[11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 00/11] ARM: shmobile: MSIOF integration on r8a7790/lager and r8a7791/koelsch
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
This patch series integrates support for the MSIOF module in the Renesas
R-Car H2 (r8a7790) and M2 (r8a7791) SoCs on the Lager and Koelsch
development boards.
It was tested on Lager and Koelsch, both legacy and DT, using a dummy
driver for the Renesas r2a11302ft PMIC that reads out the PMIC's version
ID.
[01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
[02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
[03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
[04/11] ARM: shmobile: lager legacy: Add MSIOF support
[05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
[06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add
spi0 alias
[07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add
spi0 alias
[08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
[09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
[10/11] ARM: shmobile: lager dts: Add MSIOF nodes
[11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
shmobile: r8a7791: Add MSIOF clocks in device tree").
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1ab4f3d5a8c2..224f4a7ee52a 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -667,7 +667,7 @@
R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>;
clock-output-names - "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
+ "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
"scifb1", "msiof1", "scifb2";
};
mstp3_clks: mstp3_clks@e615013c {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
Laurent Pinchart
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
shmobile: r8a7791: Add MSIOF clocks in device tree").
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1ab4f3d5a8c2..224f4a7ee52a 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -667,7 +667,7 @@
R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>;
clock-output-names =
- "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
+ "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
"scifb1", "msiof1", "scifb2";
};
mstp3_clks: mstp3_clks@e615013c {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
shmobile: r8a7791: Add MSIOF clocks in device tree").
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1ab4f3d5a8c2..224f4a7ee52a 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -667,7 +667,7 @@
R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>;
clock-output-names =
- "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
+ "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
"scifb1", "msiof1", "scifb2";
};
mstp3_clks: mstp3_clks at e615013c {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add clocks for MSIOF0, 1, 2, and 3.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 02b940361a66..f0dce2ed4ab2 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -46,6 +46,7 @@
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
+#define SMSTPCR0 0xe6150130
#define SMSTPCR1 0xe6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
@@ -55,6 +56,7 @@
#define SMSTPCR9 0xe6150994
#define SMSTPCR10 0xe6150998
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -217,8 +219,10 @@ enum {
MSTP522,
MSTP502, MSTP501,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+ MSTP216, MSTP215, MSTP208, MSTP207, MSTP206, MSTP205, MSTP204, MSTP203,
+ MSTP202,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -268,12 +272,16 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP305] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, MSTPSR3, 0), /* MMC1 */
[MSTP304] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR3, 4, MSTPSR3, 0), /* TPU0 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP215] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 15, MSTPSR2, 0), /* MSIOF3 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -348,6 +356,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.3", &mstp_clks[MSTP205]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.4", &mstp_clks[MSTP215]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add clocks for MSIOF0, 1, 2, and 3.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 02b940361a66..f0dce2ed4ab2 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -46,6 +46,7 @@
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
+#define SMSTPCR0 0xe6150130
#define SMSTPCR1 0xe6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
@@ -55,6 +56,7 @@
#define SMSTPCR9 0xe6150994
#define SMSTPCR10 0xe6150998
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -217,8 +219,10 @@ enum {
MSTP522,
MSTP502, MSTP501,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+ MSTP216, MSTP215, MSTP208, MSTP207, MSTP206, MSTP205, MSTP204, MSTP203,
+ MSTP202,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -268,12 +272,16 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP305] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, MSTPSR3, 0), /* MMC1 */
[MSTP304] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR3, 4, MSTPSR3, 0), /* TPU0 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP215] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 15, MSTPSR2, 0), /* MSIOF3 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -348,6 +356,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.3", &mstp_clks[MSTP205]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.4", &mstp_clks[MSTP215]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 02/11] ARM: shmobile: r8a7790: Add MSIOF clocks
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add clocks for MSIOF0, 1, 2, and 3.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 02b940361a66..f0dce2ed4ab2 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -46,6 +46,7 @@
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
+#define SMSTPCR0 0xe6150130
#define SMSTPCR1 0xe6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
@@ -55,6 +56,7 @@
#define SMSTPCR9 0xe6150994
#define SMSTPCR10 0xe6150998
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -217,8 +219,10 @@ enum {
MSTP522,
MSTP502, MSTP501,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+ MSTP216, MSTP215, MSTP208, MSTP207, MSTP206, MSTP205, MSTP204, MSTP203,
+ MSTP202,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -268,12 +272,16 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP305] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, MSTPSR3, 0), /* MMC1 */
[MSTP304] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR3, 4, MSTPSR3, 0), /* TPU0 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP215] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 15, MSTPSR2, 0), /* MSIOF3 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -348,6 +356,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.3", &mstp_clks[MSTP205]),
+ CLKDEV_DEV_ID("spi_r8a7790_msiof.4", &mstp_clks[MSTP215]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Add clocks for MSIOF0, 1, and 2.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
[geert] Updated for change from SH_CLK_MSTP32() to SH_CLK_MSTP32_STS()
[geert] Updated for new platform device name
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7791.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 3e1b6b699184..47d2701f5196 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -59,6 +59,7 @@
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -179,9 +180,10 @@ enum {
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP522,
MSTP314, MSTP312, MSTP311,
- MSTP216, MSTP207, MSTP206,
+ MSTP216, MSTP208, MSTP207, MSTP206, MSTP205,
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -213,8 +215,10 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP312] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD1], SMSTPCR3, 12, MSTPSR3, 0), /* SDHI1 */
[MSTP311] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD2], SMSTPCR3, 11, MSTPSR3, 0), /* SDHI2 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
@@ -222,6 +226,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA4 */
[MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA5 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -267,6 +272,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.3", &mstp_clks[MSTP205]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Takashi Yoshii,
Geert Uytterhoeven
From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Add clocks for MSIOF0, 1, and 2.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
[geert] Updated for change from SH_CLK_MSTP32() to SH_CLK_MSTP32_STS()
[geert] Updated for new platform device name
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7791.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 3e1b6b699184..47d2701f5196 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -59,6 +59,7 @@
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -179,9 +180,10 @@ enum {
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP522,
MSTP314, MSTP312, MSTP311,
- MSTP216, MSTP207, MSTP206,
+ MSTP216, MSTP208, MSTP207, MSTP206, MSTP205,
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -213,8 +215,10 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP312] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD1], SMSTPCR3, 12, MSTPSR3, 0), /* SDHI1 */
[MSTP311] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD2], SMSTPCR3, 11, MSTPSR3, 0), /* SDHI2 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
@@ -222,6 +226,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA4 */
[MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA5 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -267,6 +272,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.3", &mstp_clks[MSTP205]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 03/11] ARM: shmobile: r8a7791: Add MSIOF clocks
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Add clocks for MSIOF0, 1, and 2.
DEV_ID is 1-based for compatibility with the BSP, as QSPI uses zero.
Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
[geert] Updated for change from SH_CLK_MSTP32() to SH_CLK_MSTP32_STS()
[geert] Updated for new platform device name
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/clock-r8a7791.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 3e1b6b699184..47d2701f5196 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -59,6 +59,7 @@
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
+#define MSTPSR0 IOMEM(0xe6150030)
#define MSTPSR1 IOMEM(0xe6150038)
#define MSTPSR2 IOMEM(0xe6150040)
#define MSTPSR3 IOMEM(0xe6150048)
@@ -179,9 +180,10 @@ enum {
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP522,
MSTP314, MSTP312, MSTP311,
- MSTP216, MSTP207, MSTP206,
+ MSTP216, MSTP208, MSTP207, MSTP206, MSTP205,
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
MSTP124,
+ MSTP000,
MSTP_NR
};
@@ -213,8 +215,10 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP312] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD1], SMSTPCR3, 12, MSTPSR3, 0), /* SDHI1 */
[MSTP311] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD2], SMSTPCR3, 11, MSTPSR3, 0), /* SDHI2 */
[MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */
+ [MSTP208] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 8, MSTPSR2, 0), /* MSIOF1 */
[MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */
+ [MSTP205] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 5, MSTPSR2, 0), /* MSIOF2 */
[MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */
@@ -222,6 +226,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA4 */
[MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA5 */
[MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */
+ [MSTP000] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR0, 0, MSTPSR0, 0), /* MSIOF0 */
};
static struct clk_lookup lookups[] = {
@@ -267,6 +272,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.1", &mstp_clks[MSTP000]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.2", &mstp_clks[MSTP208]),
+ CLKDEV_DEV_ID("spi_r8a7791_msiof.3", &mstp_clks[MSTP205]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF1 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
1 file changed, 58 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index f0104bfe544e..6062bcbda366 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -55,6 +55,7 @@
#include <linux/mtd/mtd.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <sound/rcar_snd.h>
#include <sound/simple_card.h>
@@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
.dma_mask = DMA_BIT_MASK(32),
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct resource sh_msiof3_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6c90000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(159)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7790_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7790_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
static struct mtd_partition spi_flash_part[] = {
/* Reserved for user loader program, read-only */
@@ -325,12 +360,19 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 2,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -703,6 +745,15 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
/* I2C2 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
"i2c2", "i2c2"),
+ /* MSIOF1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_clk", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_sync", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_rx", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_tx", "msiof1"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
"qspi_ctrl", "qspi"),
@@ -811,6 +862,7 @@ static void __init lager_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7790_register_msiof(1);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF1 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
1 file changed, 58 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index f0104bfe544e..6062bcbda366 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -55,6 +55,7 @@
#include <linux/mtd/mtd.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <sound/rcar_snd.h>
#include <sound/simple_card.h>
@@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
.dma_mask = DMA_BIT_MASK(32),
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct resource sh_msiof3_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6c90000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(159)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7790_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7790_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
static struct mtd_partition spi_flash_part[] = {
/* Reserved for user loader program, read-only */
@@ -325,12 +360,19 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 2,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -703,6 +745,15 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
/* I2C2 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
"i2c2", "i2c2"),
+ /* MSIOF1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_clk", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_sync", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_rx", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_tx", "msiof1"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
"qspi_ctrl", "qspi"),
@@ -811,6 +862,7 @@ static void __init lager_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7790_register_msiof(1);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF1 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
1 file changed, 58 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index f0104bfe544e..6062bcbda366 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -55,6 +55,7 @@
#include <linux/mtd/mtd.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <sound/rcar_snd.h>
#include <sound/simple_card.h>
@@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
.dma_mask = DMA_BIT_MASK(32),
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct resource sh_msiof3_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6c90000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(159)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7790_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7790_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
static struct mtd_partition spi_flash_part[] = {
/* Reserved for user loader program, read-only */
@@ -325,12 +360,19 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 2,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -703,6 +745,15 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
/* I2C2 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
"i2c2", "i2c2"),
+ /* MSIOF1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_clk", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_sync", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_rx", "msiof1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7790_msiof.2", "pfc-r8a7790",
+ "msiof1_tx", "msiof1"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
"qspi_ctrl", "qspi"),
@@ -811,6 +862,7 @@ static void __init lager_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7790_register_msiof(1);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF0 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Based on patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-koelsch.c | 59 ++++++++++++++++++++++++++++----
1 file changed, 53 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..47bf588fc5ce 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -44,6 +44,7 @@
#include <linux/sh_eth.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
@@ -184,6 +185,35 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
.num_chipselect = 1,
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7791_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7791_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
static struct mtd_partition spi_flash_part[] = {
{
@@ -214,12 +244,19 @@ static const struct flash_platform_data spi_flash_data = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 1,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -384,6 +421,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* MSIOF0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_clk", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_sync", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_rx", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_tx", "msiof0"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
"qspi_ctrl", "qspi"),
@@ -449,6 +495,7 @@ static void __init koelsch_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7791_register_msiof(0);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF0 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Based on patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-koelsch.c | 59 ++++++++++++++++++++++++++++----
1 file changed, 53 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..47bf588fc5ce 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -44,6 +44,7 @@
#include <linux/sh_eth.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
@@ -184,6 +185,35 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
.num_chipselect = 1,
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7791_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7791_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
static struct mtd_partition spi_flash_part[] = {
{
@@ -214,12 +244,19 @@ static const struct flash_platform_data spi_flash_data = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 1,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -384,6 +421,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* MSIOF0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_clk", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_sync", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_rx", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_tx", "msiof0"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
"qspi_ctrl", "qspi"),
@@ -449,6 +495,7 @@ static void __init koelsch_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7791_register_msiof(0);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 05/11] ARM: shmobile: koelsch legacy: Add MSIOF support
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add MSIOF resources, platform data, platform device, pinctrl, and SPI
child device.
- Platform device numbering is 1-based for compatibility with the BSP,
as QSPI uses zero.
- Only MSIOF0 is in use, and thus registered. Its bus contains a single
device (a Renesas R2A11302FT PMIC).
Based on patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-koelsch.c | 59 ++++++++++++++++++++++++++++----
1 file changed, 53 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..47bf588fc5ce 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -44,6 +44,7 @@
#include <linux/sh_eth.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
+#include <linux/spi/sh_msiof.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
@@ -184,6 +185,35 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
.num_chipselect = 1,
};
+/* MSIOF */
+static const struct resource sh_msiof0_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e20000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(156)),
+};
+
+static const struct resource sh_msiof1_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e10000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(157)),
+};
+
+static const struct resource sh_msiof2_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6e00000, 0x0064),
+ DEFINE_RES_IRQ(gic_spi(158)),
+};
+
+static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
+ .rx_fifo_override = 256,
+ .num_chipselect = 1,
+};
+
+#define r8a7791_register_msiof(idx) \
+ platform_device_register_resndata(&platform_bus, \
+ "spi_r8a7791_msiof", \
+ (idx+1), sh_msiof##idx##_resources, \
+ ARRAY_SIZE(sh_msiof##idx##_resources), \
+ &sh_msiof_info, \
+ sizeof(struct sh_msiof_spi_info))
+
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
static struct mtd_partition spi_flash_part[] = {
{
@@ -214,12 +244,19 @@ static const struct flash_platform_data spi_flash_data = {
static const struct spi_board_info spi_info[] __initconst = {
{
- .modalias = "m25p80",
- .platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ }, {
+ .modalias = "r2a1130x",
+ .max_speed_hz = 6000000,
+ .chip_select = 0,
+ .bus_num = 1,
+ .mode = SPI_MODE_3,
+ .controller_data = (void *)-ENOENT, /* HW controlled CS */
},
};
@@ -384,6 +421,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* MSIOF0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_clk", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_sync", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_rx", "msiof0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791",
+ "msiof0_tx", "msiof0"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
"qspi_ctrl", "qspi"),
@@ -449,6 +495,7 @@ static void __init koelsch_add_standard_devices(void)
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
+ r8a7791_register_msiof(0);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a90106e96c..5d53def10c42 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,7 +144,7 @@
renesas,function = "mmc1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -164,7 +164,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c396afea..bc652a2848e7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -23,6 +23,7 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ spi0 = &qspi;
};
cpus {
@@ -753,7 +754,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a90106e96c..5d53def10c42 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,7 +144,7 @@
renesas,function = "mmc1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -164,7 +164,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c396afea..bc652a2848e7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -23,6 +23,7 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ spi0 = &qspi;
};
cpus {
@@ -753,7 +754,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a90106e96c..5d53def10c42 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,7 +144,7 @@
renesas,function = "mmc1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -164,7 +164,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c396afea..bc652a2848e7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -23,6 +23,7 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ spi0 = &qspi;
};
cpus {
@@ -753,7 +754,7 @@
};
};
- spi: spi at e6b10000 {
+ qspi: spi at e6b10000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add spi0 alias
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bf6ba0c7faa0..cc6e63914f7c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -146,7 +146,7 @@
renesas,function = "scif1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -156,7 +156,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 224f4a7ee52a..da5ce503d214 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
};
cpus {
@@ -750,7 +751,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add spi0 alias
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bf6ba0c7faa0..cc6e63914f7c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -146,7 +146,7 @@
renesas,function = "scif1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -156,7 +156,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 224f4a7ee52a..da5ce503d214 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
};
cpus {
@@ -750,7 +751,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add spi0 alias
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bf6ba0c7faa0..cc6e63914f7c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -146,7 +146,7 @@
renesas,function = "scif1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -156,7 +156,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 224f4a7ee52a..da5ce503d214 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
};
cpus {
@@ -750,7 +751,7 @@
};
};
- spi: spi at e6b10000 {
+ qspi: spi at e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index bc652a2848e7..aab5f4cf6ce2 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
+ spi4 = &msiof3;
};
cpus {
@@ -764,4 +768,52 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index bc652a2848e7..aab5f4cf6ce2 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
+ spi4 = &msiof3;
};
cpus {
@@ -764,4 +768,52 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7790.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index bc652a2848e7..aab5f4cf6ce2 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
+ spi4 = &msiof3;
};
cpus {
@@ -764,4 +768,52 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi at e6e20000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi at e6e10000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi at e6e00000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi at e6c90000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index da5ce503d214..c336ddecf75b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -27,6 +27,9 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
};
cpus {
@@ -761,4 +764,40 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index da5ce503d214..c336ddecf75b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -27,6 +27,9 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
};
cpus {
@@ -761,4 +764,40 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7791.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index da5ce503d214..c336ddecf75b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -27,6 +27,9 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
};
cpus {
@@ -761,4 +764,40 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi at e6e20000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi at e6e10000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi at e6e00000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 10/11] ARM: shmobile: lager dts: Add MSIOF nodes
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 5d53def10c42..0658c881687e 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -148,6 +148,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof1_pins: spi2 {
+ renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+ "msiof1_tx";
+ renesas,function = "msiof1";
+ };
};
&mmcif1 {
@@ -195,6 +201,22 @@
};
};
+&msiof1 {
+ pinctrl-0 = <&msiof1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic@0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+
+};
+
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 10/11] ARM: shmobile: lager dts: Add MSIOF nodes
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 5d53def10c42..0658c881687e 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -148,6 +148,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof1_pins: spi2 {
+ renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+ "msiof1_tx";
+ renesas,function = "msiof1";
+ };
};
&mmcif1 {
@@ -195,6 +201,22 @@
};
};
+&msiof1 {
+ pinctrl-0 = <&msiof1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic@0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+
+};
+
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 10/11] ARM: shmobile: lager dts: Add MSIOF nodes
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 5d53def10c42..0658c881687e 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -148,6 +148,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof1_pins: spi2 {
+ renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+ "msiof1_tx";
+ renesas,function = "msiof1";
+ };
};
&mmcif1 {
@@ -195,6 +201,22 @@
};
};
+&msiof1 {
+ pinctrl-0 = <&msiof1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic at 0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+
+};
+
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 14:49 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Koelsch.
On this board, only MSIOF0 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index cc6e63914f7c..b29ca85b248f 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -150,6 +150,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof0_pins: spi1 {
+ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+ "msiof0_tx";
+ renesas,function = "msiof0";
+ };
};
&sata0 {
@@ -186,3 +192,18 @@
};
};
};
+
+&msiof0 {
+ pinctrl-0 = <&msiof0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic@0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven, devicetree
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Koelsch.
On this board, only MSIOF0 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index cc6e63914f7c..b29ca85b248f 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -150,6 +150,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof0_pins: spi1 {
+ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+ "msiof0_tx";
+ renesas,function = "msiof0";
+ };
};
&sata0 {
@@ -186,3 +192,18 @@
};
};
};
+
+&msiof0 {
+ pinctrl-0 = <&msiof0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic@0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH 11/11] ARM: shmobile: koelsch dts: Add MSIOF nodes
@ 2014-02-20 14:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Koelsch.
On this board, only MSIOF0 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index cc6e63914f7c..b29ca85b248f 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -150,6 +150,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof0_pins: spi1 {
+ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+ "msiof0_tx";
+ renesas,function = "msiof0";
+ };
};
&sata0 {
@@ -186,3 +192,18 @@
};
};
};
+
+&msiof0 {
+ pinctrl-0 = <&msiof0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic at 0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 15:48 ` Magnus Damm
-1 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-20 15:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Thu, Feb 20, 2014 at 11:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Add MSIOF resources, platform data, platform device, pinctrl, and SPI
> child device.
>
> - Platform device numbering is 1-based for compatibility with the BSP,
> as QSPI uses zero.
> - Only MSIOF1 is in use, and thus registered. Its bus contains a single
> device (a Renesas R2A11302FT PMIC).
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> ---
> arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
> 1 file changed, 58 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> index f0104bfe544e..6062bcbda366 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
> @@ -55,6 +55,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/spi/flash.h>
> #include <linux/spi/rspi.h>
> +#include <linux/spi/sh_msiof.h>
> #include <linux/spi/spi.h>
> #include <sound/rcar_snd.h>
> #include <sound/simple_card.h>
> @@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
> .dma_mask = DMA_BIT_MASK(32),
> };
>
> +/* MSIOF */
> +static const struct resource sh_msiof0_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(156)),
> +};
> +
> +static const struct resource sh_msiof1_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(157)),
> +};
> +
> +static const struct resource sh_msiof2_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(158)),
> +};
> +
> +static const struct resource sh_msiof3_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(159)),
> +};
> +
> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
> + .rx_fifo_override = 256,
> + .num_chipselect = 1,
> +};
> +
> +#define r8a7790_register_msiof(idx) \
> + platform_device_register_resndata(&platform_bus, \
> + "spi_r8a7790_msiof", \
> + (idx+1), sh_msiof##idx##_resources, \
> + ARRAY_SIZE(sh_msiof##idx##_resources), \
> + &sh_msiof_info, \
> + sizeof(struct sh_msiof_spi_info))
Hi Geert,
That for your efforts - it's good to see the MSIOF being integrated as
well! I have one comment on this legacy board integration code.
Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
best to omit the unused resources from above? In case of DT I think it
makes sense to define all channels in the SoC.dtsi and let the
SoC-board.dts just enable the channels that are used. But in this case
with legacy code I think we should keep thing simple and small and
just enable the bits that are used on the particular board.
The same obviously applies to the Koelsch legacy code as well. =)
Thanks,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 15:48 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-20 15:48 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Geert,
On Thu, Feb 20, 2014 at 11:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Add MSIOF resources, platform data, platform device, pinctrl, and SPI
> child device.
>
> - Platform device numbering is 1-based for compatibility with the BSP,
> as QSPI uses zero.
> - Only MSIOF1 is in use, and thus registered. Its bus contains a single
> device (a Renesas R2A11302FT PMIC).
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> ---
> arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
> 1 file changed, 58 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> index f0104bfe544e..6062bcbda366 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
> @@ -55,6 +55,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/spi/flash.h>
> #include <linux/spi/rspi.h>
> +#include <linux/spi/sh_msiof.h>
> #include <linux/spi/spi.h>
> #include <sound/rcar_snd.h>
> #include <sound/simple_card.h>
> @@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
> .dma_mask = DMA_BIT_MASK(32),
> };
>
> +/* MSIOF */
> +static const struct resource sh_msiof0_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(156)),
> +};
> +
> +static const struct resource sh_msiof1_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(157)),
> +};
> +
> +static const struct resource sh_msiof2_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(158)),
> +};
> +
> +static const struct resource sh_msiof3_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(159)),
> +};
> +
> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
> + .rx_fifo_override = 256,
> + .num_chipselect = 1,
> +};
> +
> +#define r8a7790_register_msiof(idx) \
> + platform_device_register_resndata(&platform_bus, \
> + "spi_r8a7790_msiof", \
> + (idx+1), sh_msiof##idx##_resources, \
> + ARRAY_SIZE(sh_msiof##idx##_resources), \
> + &sh_msiof_info, \
> + sizeof(struct sh_msiof_spi_info))
Hi Geert,
That for your efforts - it's good to see the MSIOF being integrated as
well! I have one comment on this legacy board integration code.
Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
best to omit the unused resources from above? In case of DT I think it
makes sense to define all channels in the SoC.dtsi and let the
SoC-board.dts just enable the channels that are used. But in this case
with legacy code I think we should keep thing simple and small and
just enable the bits that are used on the particular board.
The same obviously applies to the Koelsch legacy code as well. =)
Thanks,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 15:48 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-20 15:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Thu, Feb 20, 2014 at 11:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Add MSIOF resources, platform data, platform device, pinctrl, and SPI
> child device.
>
> - Platform device numbering is 1-based for compatibility with the BSP,
> as QSPI uses zero.
> - Only MSIOF1 is in use, and thus registered. Its bus contains a single
> device (a Renesas R2A11302FT PMIC).
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> ---
> arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++----
> 1 file changed, 58 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> index f0104bfe544e..6062bcbda366 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
> @@ -55,6 +55,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/spi/flash.h>
> #include <linux/spi/rspi.h>
> +#include <linux/spi/sh_msiof.h>
> #include <linux/spi/spi.h>
> #include <sound/rcar_snd.h>
> #include <sound/simple_card.h>
> @@ -287,6 +288,40 @@ static const struct platform_device_info ether_info __initconst = {
> .dma_mask = DMA_BIT_MASK(32),
> };
>
> +/* MSIOF */
> +static const struct resource sh_msiof0_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(156)),
> +};
> +
> +static const struct resource sh_msiof1_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(157)),
> +};
> +
> +static const struct resource sh_msiof2_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(158)),
> +};
> +
> +static const struct resource sh_msiof3_resources[] __initconst = {
> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
> + DEFINE_RES_IRQ(gic_spi(159)),
> +};
> +
> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
> + .rx_fifo_override = 256,
> + .num_chipselect = 1,
> +};
> +
> +#define r8a7790_register_msiof(idx) \
> + platform_device_register_resndata(&platform_bus, \
> + "spi_r8a7790_msiof", \
> + (idx+1), sh_msiof##idx##_resources, \
> + ARRAY_SIZE(sh_msiof##idx##_resources), \
> + &sh_msiof_info, \
> + sizeof(struct sh_msiof_spi_info))
Hi Geert,
That for your efforts - it's good to see the MSIOF being integrated as
well! I have one comment on this legacy board integration code.
Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
best to omit the unused resources from above? In case of DT I think it
makes sense to define all channels in the SoC.dtsi and let the
SoC-board.dts just enable the channels that are used. But in this case
with legacy code I think we should keep thing simple and small and
just enable the bits that are used on the particular board.
The same obviously applies to the Koelsch legacy code as well. =)
Thanks,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-20 15:48 ` Magnus Damm
(?)
@ 2014-02-20 16:18 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 16:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> +/* MSIOF */
>> +static const struct resource sh_msiof0_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(156)),
>> +};
>> +
>> +static const struct resource sh_msiof1_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(157)),
>> +};
>> +
>> +static const struct resource sh_msiof2_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(158)),
>> +};
>> +
>> +static const struct resource sh_msiof3_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(159)),
>> +};
>> +
>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>> + .rx_fifo_override = 256,
>> + .num_chipselect = 1,
>> +};
>> +
>> +#define r8a7790_register_msiof(idx) \
>> + platform_device_register_resndata(&platform_bus, \
>> + "spi_r8a7790_msiof", \
>> + (idx+1), sh_msiof##idx##_resources, \
>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>> + &sh_msiof_info, \
>> + sizeof(struct sh_msiof_spi_info))
>
> That for your efforts - it's good to see the MSIOF being integrated as
> well! I have one comment on this legacy board integration code.
>
> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
> best to omit the unused resources from above? In case of DT I think it
> makes sense to define all channels in the SoC.dtsi and let the
> SoC-board.dts just enable the channels that are used. But in this case
> with legacy code I think we should keep thing simple and small and
> just enable the bits that are used on the particular board.
>
> The same obviously applies to the Koelsch legacy code as well. =)
Note that while all resources are present, only MSIOF1 is registered on
Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
has all resources, but only registers active devices.
It's your preference, though, so I can adapt if you want.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 16:18 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 16:18 UTC (permalink / raw)
To: Magnus Damm
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Magnus,
On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> +/* MSIOF */
>> +static const struct resource sh_msiof0_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(156)),
>> +};
>> +
>> +static const struct resource sh_msiof1_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(157)),
>> +};
>> +
>> +static const struct resource sh_msiof2_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(158)),
>> +};
>> +
>> +static const struct resource sh_msiof3_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(159)),
>> +};
>> +
>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>> + .rx_fifo_override = 256,
>> + .num_chipselect = 1,
>> +};
>> +
>> +#define r8a7790_register_msiof(idx) \
>> + platform_device_register_resndata(&platform_bus, \
>> + "spi_r8a7790_msiof", \
>> + (idx+1), sh_msiof##idx##_resources, \
>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>> + &sh_msiof_info, \
>> + sizeof(struct sh_msiof_spi_info))
>
> That for your efforts - it's good to see the MSIOF being integrated as
> well! I have one comment on this legacy board integration code.
>
> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
> best to omit the unused resources from above? In case of DT I think it
> makes sense to define all channels in the SoC.dtsi and let the
> SoC-board.dts just enable the channels that are used. But in this case
> with legacy code I think we should keep thing simple and small and
> just enable the bits that are used on the particular board.
>
> The same obviously applies to the Koelsch legacy code as well. =)
Note that while all resources are present, only MSIOF1 is registered on
Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
has all resources, but only registers active devices.
It's your preference, though, so I can adapt if you want.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-20 16:18 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-20 16:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> +/* MSIOF */
>> +static const struct resource sh_msiof0_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(156)),
>> +};
>> +
>> +static const struct resource sh_msiof1_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(157)),
>> +};
>> +
>> +static const struct resource sh_msiof2_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(158)),
>> +};
>> +
>> +static const struct resource sh_msiof3_resources[] __initconst = {
>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>> + DEFINE_RES_IRQ(gic_spi(159)),
>> +};
>> +
>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>> + .rx_fifo_override = 256,
>> + .num_chipselect = 1,
>> +};
>> +
>> +#define r8a7790_register_msiof(idx) \
>> + platform_device_register_resndata(&platform_bus, \
>> + "spi_r8a7790_msiof", \
>> + (idx+1), sh_msiof##idx##_resources, \
>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>> + &sh_msiof_info, \
>> + sizeof(struct sh_msiof_spi_info))
>
> That for your efforts - it's good to see the MSIOF being integrated as
> well! I have one comment on this legacy board integration code.
>
> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
> best to omit the unused resources from above? In case of DT I think it
> makes sense to define all channels in the SoC.dtsi and let the
> SoC-board.dts just enable the channels that are used. But in this case
> with legacy code I think we should keep thing simple and small and
> just enable the bits that are used on the particular board.
>
> The same obviously applies to the Koelsch legacy code as well. =)
Note that while all resources are present, only MSIOF1 is registered on
Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
has all resources, but only registers active devices.
It's your preference, though, so I can adapt if you want.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-20 23:24 ` Laurent Pinchart
-1 siblings, 0 replies; 62+ messages in thread
From: Laurent Pinchart @ 2014-02-20 23:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
(CC'ing Linus Walleij)
Thank you for the patch.
On Thursday 20 February 2014 15:49:29 Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 1ab4f3d5a8c2..224f4a7ee52a 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -667,7 +667,7 @@
> R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>
> >;
>
> clock-output-names > - "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
> + "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
> "scifb1", "msiof1", "scifb2";
> };
> mstp3_clks: mstp3_clks@e615013c {
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-20 23:24 ` Laurent Pinchart
0 siblings, 0 replies; 62+ messages in thread
From: Laurent Pinchart @ 2014-02-20 23:24 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, Magnus Damm, linux-sh, linux-arm-kernel,
linux-kernel, Geert Uytterhoeven, Linus Walleij
Hi Geert,
(CC'ing Linus Walleij)
Thank you for the patch.
On Thursday 20 February 2014 15:49:29 Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 1ab4f3d5a8c2..224f4a7ee52a 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -667,7 +667,7 @@
> R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>
> >;
>
> clock-output-names =
> - "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
> + "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
> "scifb1", "msiof1", "scifb2";
> };
> mstp3_clks: mstp3_clks@e615013c {
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-20 23:24 ` Laurent Pinchart
0 siblings, 0 replies; 62+ messages in thread
From: Laurent Pinchart @ 2014-02-20 23:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
(CC'ing Linus Walleij)
Thank you for the patch.
On Thursday 20 February 2014 15:49:29 Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 1ab4f3d5a8c2..224f4a7ee52a 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -667,7 +667,7 @@
> R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
>
> >;
>
> clock-output-names =
> - "scifa2", "scifa1", "scifa0", "misof2", "scifb0",
> + "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
> "scifb1", "msiof1", "scifb2";
> };
> mstp3_clks: mstp3_clks at e615013c {
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-20 16:18 ` Geert Uytterhoeven
(?)
@ 2014-02-24 2:09 ` Magnus Damm
-1 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 2:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> +/* MSIOF */
>>> +static const struct resource sh_msiof0_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(156)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof1_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(157)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof2_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(158)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof3_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(159)),
>>> +};
>>> +
>>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>>> + .rx_fifo_override = 256,
>>> + .num_chipselect = 1,
>>> +};
>>> +
>>> +#define r8a7790_register_msiof(idx) \
>>> + platform_device_register_resndata(&platform_bus, \
>>> + "spi_r8a7790_msiof", \
>>> + (idx+1), sh_msiof##idx##_resources, \
>>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>>> + &sh_msiof_info, \
>>> + sizeof(struct sh_msiof_spi_info))
>>
>> That for your efforts - it's good to see the MSIOF being integrated as
>> well! I have one comment on this legacy board integration code.
>>
>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>> best to omit the unused resources from above? In case of DT I think it
>> makes sense to define all channels in the SoC.dtsi and let the
>> SoC-board.dts just enable the channels that are used. But in this case
>> with legacy code I think we should keep thing simple and small and
>> just enable the bits that are used on the particular board.
>>
>> The same obviously applies to the Koelsch legacy code as well. =)
>
> Note that while all resources are present, only MSIOF1 is registered on
> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
> has all resources, but only registers active devices.
Ok, I understand. Thanks for brining this to my attention.
I'd like to avoid having unused resources so I'll cook up a patch to
rework that myself.
> It's your preference, though, so I can adapt if you want.
Thanks.
Please rework this patch to only register a single MSIOF channel. I
think it makes sense to only enable hardware that is being used.
Another question: How about "bus_num" and the platform device id
mapping? I'd like them to be the same if possible, but you are having
this "(idx+1)" bit in your code which I assume is to add offset for
the QSPI bus.
Regarding the PFC configuration, can you please double check that the
PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
it the "bus_num" or the platform device id that is being used in case
of SPI?
Thanks!
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 2:09 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 2:09 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Geert,
On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> +/* MSIOF */
>>> +static const struct resource sh_msiof0_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(156)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof1_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(157)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof2_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(158)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof3_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(159)),
>>> +};
>>> +
>>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>>> + .rx_fifo_override = 256,
>>> + .num_chipselect = 1,
>>> +};
>>> +
>>> +#define r8a7790_register_msiof(idx) \
>>> + platform_device_register_resndata(&platform_bus, \
>>> + "spi_r8a7790_msiof", \
>>> + (idx+1), sh_msiof##idx##_resources, \
>>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>>> + &sh_msiof_info, \
>>> + sizeof(struct sh_msiof_spi_info))
>>
>> That for your efforts - it's good to see the MSIOF being integrated as
>> well! I have one comment on this legacy board integration code.
>>
>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>> best to omit the unused resources from above? In case of DT I think it
>> makes sense to define all channels in the SoC.dtsi and let the
>> SoC-board.dts just enable the channels that are used. But in this case
>> with legacy code I think we should keep thing simple and small and
>> just enable the bits that are used on the particular board.
>>
>> The same obviously applies to the Koelsch legacy code as well. =)
>
> Note that while all resources are present, only MSIOF1 is registered on
> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
> has all resources, but only registers active devices.
Ok, I understand. Thanks for brining this to my attention.
I'd like to avoid having unused resources so I'll cook up a patch to
rework that myself.
> It's your preference, though, so I can adapt if you want.
Thanks.
Please rework this patch to only register a single MSIOF channel. I
think it makes sense to only enable hardware that is being used.
Another question: How about "bus_num" and the platform device id
mapping? I'd like them to be the same if possible, but you are having
this "(idx+1)" bit in your code which I assume is to add offset for
the QSPI bus.
Regarding the PFC configuration, can you please double check that the
PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
it the "bus_num" or the platform device id that is being used in case
of SPI?
Thanks!
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 2:09 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 2:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> +/* MSIOF */
>>> +static const struct resource sh_msiof0_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e20000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(156)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof1_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e10000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(157)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof2_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6e00000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(158)),
>>> +};
>>> +
>>> +static const struct resource sh_msiof3_resources[] __initconst = {
>>> + DEFINE_RES_MEM(0xe6c90000, 0x0064),
>>> + DEFINE_RES_IRQ(gic_spi(159)),
>>> +};
>>> +
>>> +static const struct sh_msiof_spi_info sh_msiof_info __initconst = {
>>> + .rx_fifo_override = 256,
>>> + .num_chipselect = 1,
>>> +};
>>> +
>>> +#define r8a7790_register_msiof(idx) \
>>> + platform_device_register_resndata(&platform_bus, \
>>> + "spi_r8a7790_msiof", \
>>> + (idx+1), sh_msiof##idx##_resources, \
>>> + ARRAY_SIZE(sh_msiof##idx##_resources), \
>>> + &sh_msiof_info, \
>>> + sizeof(struct sh_msiof_spi_info))
>>
>> That for your efforts - it's good to see the MSIOF being integrated as
>> well! I have one comment on this legacy board integration code.
>>
>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>> best to omit the unused resources from above? In case of DT I think it
>> makes sense to define all channels in the SoC.dtsi and let the
>> SoC-board.dts just enable the channels that are used. But in this case
>> with legacy code I think we should keep thing simple and small and
>> just enable the bits that are used on the particular board.
>>
>> The same obviously applies to the Koelsch legacy code as well. =)
>
> Note that while all resources are present, only MSIOF1 is registered on
> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
> has all resources, but only registers active devices.
Ok, I understand. Thanks for brining this to my attention.
I'd like to avoid having unused resources so I'll cook up a patch to
rework that myself.
> It's your preference, though, so I can adapt if you want.
Thanks.
Please rework this patch to only register a single MSIOF channel. I
think it makes sense to only enable hardware that is being used.
Another question: How about "bus_num" and the platform device id
mapping? I'd like them to be the same if possible, but you are having
this "(idx+1)" bit in your code which I assume is to add offset for
the QSPI bus.
Regarding the PFC configuration, can you please double check that the
PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
it the "bus_num" or the platform device id that is being used in case
of SPI?
Thanks!
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-24 2:09 ` Magnus Damm
(?)
@ 2014-02-24 8:25 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 8:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>> best to omit the unused resources from above? In case of DT I think it
>>> makes sense to define all channels in the SoC.dtsi and let the
>>> SoC-board.dts just enable the channels that are used. But in this case
>>> with legacy code I think we should keep thing simple and small and
>>> just enable the bits that are used on the particular board.
>>>
>>> The same obviously applies to the Koelsch legacy code as well. =)
>>
>> Note that while all resources are present, only MSIOF1 is registered on
>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>> has all resources, but only registers active devices.
>
> Ok, I understand. Thanks for brining this to my attention.
>
> I'd like to avoid having unused resources so I'll cook up a patch to
> rework that myself.
>
>> It's your preference, though, so I can adapt if you want.
>
> Thanks.
>
> Please rework this patch to only register a single MSIOF channel. I
> think it makes sense to only enable hardware that is being used.
Ehrm, I already register a single MSIOF channel only.
Perhaps you mean't "remove the unused resources"?
> Another question: How about "bus_num" and the platform device id
> mapping? I'd like them to be the same if possible, but you are having
> this "(idx+1)" bit in your code which I assume is to add offset for
> the QSPI bus.
"bus_num" is the SPI-specific numbering of SPI masters, which is filled
in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
of e.g. "spi_r8a7790_msiof.1").
It's used for matching SPI slaves in spi_board_info with SPI masters.
As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
bus_num 1 to 4, hence the "idx+1", and the platform device names
"spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
(Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
on all SoCs with MSIOF.)
With DT, all of this doesn't matter, and life is easier, as the SPI slaves
are child nodes of the SPI masters and thus don't need numerical bus
references. So MSIOF0 can be called "msiof0" there.
We still have the offsets in the "spi%u" aliases, though.
> Regarding the PFC configuration, can you please double check that the
> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
> it the "bus_num" or the platform device id that is being used in case
> of SPI?
"bus_num" is SPI-specific. Pinctrl uses the actual device's name:
/**
* struct pinctrl_map - boards/machines shall provide this map for devices
* @dev_name: the name of the device using this specific mapping, the name
* must be the same as in your struct device*. If this name is set to the
* same name as the pin controllers own dev_name(), the map entry will be
* hogged by the driver itself upon registration
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 8:25 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 8:25 UTC (permalink / raw)
To: Magnus Damm
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Magnus,
On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>> best to omit the unused resources from above? In case of DT I think it
>>> makes sense to define all channels in the SoC.dtsi and let the
>>> SoC-board.dts just enable the channels that are used. But in this case
>>> with legacy code I think we should keep thing simple and small and
>>> just enable the bits that are used on the particular board.
>>>
>>> The same obviously applies to the Koelsch legacy code as well. =)
>>
>> Note that while all resources are present, only MSIOF1 is registered on
>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>> has all resources, but only registers active devices.
>
> Ok, I understand. Thanks for brining this to my attention.
>
> I'd like to avoid having unused resources so I'll cook up a patch to
> rework that myself.
>
>> It's your preference, though, so I can adapt if you want.
>
> Thanks.
>
> Please rework this patch to only register a single MSIOF channel. I
> think it makes sense to only enable hardware that is being used.
Ehrm, I already register a single MSIOF channel only.
Perhaps you mean't "remove the unused resources"?
> Another question: How about "bus_num" and the platform device id
> mapping? I'd like them to be the same if possible, but you are having
> this "(idx+1)" bit in your code which I assume is to add offset for
> the QSPI bus.
"bus_num" is the SPI-specific numbering of SPI masters, which is filled
in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
of e.g. "spi_r8a7790_msiof.1").
It's used for matching SPI slaves in spi_board_info with SPI masters.
As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
bus_num 1 to 4, hence the "idx+1", and the platform device names
"spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
(Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
on all SoCs with MSIOF.)
With DT, all of this doesn't matter, and life is easier, as the SPI slaves
are child nodes of the SPI masters and thus don't need numerical bus
references. So MSIOF0 can be called "msiof0" there.
We still have the offsets in the "spi%u" aliases, though.
> Regarding the PFC configuration, can you please double check that the
> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
> it the "bus_num" or the platform device id that is being used in case
> of SPI?
"bus_num" is SPI-specific. Pinctrl uses the actual device's name:
/**
* struct pinctrl_map - boards/machines shall provide this map for devices
* @dev_name: the name of the device using this specific mapping, the name
* must be the same as in your struct device*. If this name is set to the
* same name as the pin controllers own dev_name(), the map entry will be
* hogged by the driver itself upon registration
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 8:25 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 8:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>> best to omit the unused resources from above? In case of DT I think it
>>> makes sense to define all channels in the SoC.dtsi and let the
>>> SoC-board.dts just enable the channels that are used. But in this case
>>> with legacy code I think we should keep thing simple and small and
>>> just enable the bits that are used on the particular board.
>>>
>>> The same obviously applies to the Koelsch legacy code as well. =)
>>
>> Note that while all resources are present, only MSIOF1 is registered on
>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>> has all resources, but only registers active devices.
>
> Ok, I understand. Thanks for brining this to my attention.
>
> I'd like to avoid having unused resources so I'll cook up a patch to
> rework that myself.
>
>> It's your preference, though, so I can adapt if you want.
>
> Thanks.
>
> Please rework this patch to only register a single MSIOF channel. I
> think it makes sense to only enable hardware that is being used.
Ehrm, I already register a single MSIOF channel only.
Perhaps you mean't "remove the unused resources"?
> Another question: How about "bus_num" and the platform device id
> mapping? I'd like them to be the same if possible, but you are having
> this "(idx+1)" bit in your code which I assume is to add offset for
> the QSPI bus.
"bus_num" is the SPI-specific numbering of SPI masters, which is filled
in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
of e.g. "spi_r8a7790_msiof.1").
It's used for matching SPI slaves in spi_board_info with SPI masters.
As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
bus_num 1 to 4, hence the "idx+1", and the platform device names
"spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
(Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
on all SoCs with MSIOF.)
With DT, all of this doesn't matter, and life is easier, as the SPI slaves
are child nodes of the SPI masters and thus don't need numerical bus
references. So MSIOF0 can be called "msiof0" there.
We still have the offsets in the "spi%u" aliases, though.
> Regarding the PFC configuration, can you please double check that the
> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
> it the "bus_num" or the platform device id that is being used in case
> of SPI?
"bus_num" is SPI-specific. Pinctrl uses the actual device's name:
/**
* struct pinctrl_map - boards/machines shall provide this map for devices
* @dev_name: the name of the device using this specific mapping, the name
* must be the same as in your struct device*. If this name is set to the
* same name as the pin controllers own dev_name(), the map entry will be
* hogged by the driver itself upon registration
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-24 8:25 ` Geert Uytterhoeven
(?)
@ 2014-02-24 8:44 ` Magnus Damm
-1 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 8:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert!
On Mon, Feb 24, 2014 at 5:25 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
>> <geert@linux-m68k.org> wrote:
>>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>>> best to omit the unused resources from above? In case of DT I think it
>>>> makes sense to define all channels in the SoC.dtsi and let the
>>>> SoC-board.dts just enable the channels that are used. But in this case
>>>> with legacy code I think we should keep thing simple and small and
>>>> just enable the bits that are used on the particular board.
>>>>
>>>> The same obviously applies to the Koelsch legacy code as well. =)
>>>
>>> Note that while all resources are present, only MSIOF1 is registered on
>>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>>> has all resources, but only registers active devices.
>>
>> Ok, I understand. Thanks for brining this to my attention.
>>
>> I'd like to avoid having unused resources so I'll cook up a patch to
>> rework that myself.
>>
>>> It's your preference, though, so I can adapt if you want.
>>
>> Thanks.
>>
>> Please rework this patch to only register a single MSIOF channel. I
>> think it makes sense to only enable hardware that is being used.
>
> Ehrm, I already register a single MSIOF channel only.
> Perhaps you mean't "remove the unused resources"?
Yes, exactly. My apologies for the unclear reply.
>> Another question: How about "bus_num" and the platform device id
>> mapping? I'd like them to be the same if possible, but you are having
>> this "(idx+1)" bit in your code which I assume is to add offset for
>> the QSPI bus.
>
> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
> of e.g. "spi_r8a7790_msiof.1").
> It's used for matching SPI slaves in spi_board_info with SPI masters.
> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
> bus_num 1 to 4, hence the "idx+1", and the platform device names
> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>
> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
> on all SoCs with MSIOF.)
Yeah, the bus number that is commonly used for SPI and I2C behaves
like that so I agree with what you're saying. I guess historically we
usually only have one I2C master and one SPI master which makes it
easy to use direct mapping between bus num and pdev->id.
Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
I'm mistaken), so the question is how to allocate the ranges of
bus_num for each SPI master. I believe your current allocation works
well but I'm a bit confused by it I must confess.
I'm used to one of the two schemes:
1) single master with pdev->id equals bus_num
2) compact board specific bus allocation
I believe you introduce something similar to 1) but for two SPI
masters which is totally fine! For some unknown reason I expected 2)
with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
allocation scheme is reusable across multiple boards with the same SoC
so I think your current code is better when I think about it a bit
more.
> With DT, all of this doesn't matter, and life is easier, as the SPI slaves
> are child nodes of the SPI masters and thus don't need numerical bus
> references. So MSIOF0 can be called "msiof0" there.
> We still have the offsets in the "spi%u" aliases, though.
Right all this goes away with DT which is nice.
>> Regarding the PFC configuration, can you please double check that the
>> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
>> it the "bus_num" or the platform device id that is being used in case
>> of SPI?
>
> "bus_num" is SPI-specific. Pinctrl uses the actual device's name:
>
> /**
> * struct pinctrl_map - boards/machines shall provide this map for devices
> * @dev_name: the name of the device using this specific mapping, the name
> * must be the same as in your struct device*. If this name is set to the
> * same name as the pin controllers own dev_name(), the map entry will be
> * hogged by the driver itself upon registration
Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
I now understand that it is your intentional design to have bus_num 0
as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
It just takes some time for me to grasp. =)
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 8:44 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 8:44 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Geert!
On Mon, Feb 24, 2014 at 5:25 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
>> <geert@linux-m68k.org> wrote:
>>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>>> best to omit the unused resources from above? In case of DT I think it
>>>> makes sense to define all channels in the SoC.dtsi and let the
>>>> SoC-board.dts just enable the channels that are used. But in this case
>>>> with legacy code I think we should keep thing simple and small and
>>>> just enable the bits that are used on the particular board.
>>>>
>>>> The same obviously applies to the Koelsch legacy code as well. =)
>>>
>>> Note that while all resources are present, only MSIOF1 is registered on
>>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>>> has all resources, but only registers active devices.
>>
>> Ok, I understand. Thanks for brining this to my attention.
>>
>> I'd like to avoid having unused resources so I'll cook up a patch to
>> rework that myself.
>>
>>> It's your preference, though, so I can adapt if you want.
>>
>> Thanks.
>>
>> Please rework this patch to only register a single MSIOF channel. I
>> think it makes sense to only enable hardware that is being used.
>
> Ehrm, I already register a single MSIOF channel only.
> Perhaps you mean't "remove the unused resources"?
Yes, exactly. My apologies for the unclear reply.
>> Another question: How about "bus_num" and the platform device id
>> mapping? I'd like them to be the same if possible, but you are having
>> this "(idx+1)" bit in your code which I assume is to add offset for
>> the QSPI bus.
>
> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
> of e.g. "spi_r8a7790_msiof.1").
> It's used for matching SPI slaves in spi_board_info with SPI masters.
> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
> bus_num 1 to 4, hence the "idx+1", and the platform device names
> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>
> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
> on all SoCs with MSIOF.)
Yeah, the bus number that is commonly used for SPI and I2C behaves
like that so I agree with what you're saying. I guess historically we
usually only have one I2C master and one SPI master which makes it
easy to use direct mapping between bus num and pdev->id.
Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
I'm mistaken), so the question is how to allocate the ranges of
bus_num for each SPI master. I believe your current allocation works
well but I'm a bit confused by it I must confess.
I'm used to one of the two schemes:
1) single master with pdev->id equals bus_num
2) compact board specific bus allocation
I believe you introduce something similar to 1) but for two SPI
masters which is totally fine! For some unknown reason I expected 2)
with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
allocation scheme is reusable across multiple boards with the same SoC
so I think your current code is better when I think about it a bit
more.
> With DT, all of this doesn't matter, and life is easier, as the SPI slaves
> are child nodes of the SPI masters and thus don't need numerical bus
> references. So MSIOF0 can be called "msiof0" there.
> We still have the offsets in the "spi%u" aliases, though.
Right all this goes away with DT which is nice.
>> Regarding the PFC configuration, can you please double check that the
>> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
>> it the "bus_num" or the platform device id that is being used in case
>> of SPI?
>
> "bus_num" is SPI-specific. Pinctrl uses the actual device's name:
>
> /**
> * struct pinctrl_map - boards/machines shall provide this map for devices
> * @dev_name: the name of the device using this specific mapping, the name
> * must be the same as in your struct device*. If this name is set to the
> * same name as the pin controllers own dev_name(), the map entry will be
> * hogged by the driver itself upon registration
Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
I now understand that it is your intentional design to have bus_num 0
as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
It just takes some time for me to grasp. =)
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 8:44 ` Magnus Damm
0 siblings, 0 replies; 62+ messages in thread
From: Magnus Damm @ 2014-02-24 8:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert!
On Mon, Feb 24, 2014 at 5:25 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Mon, Feb 24, 2014 at 3:09 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Fri, Feb 21, 2014 at 1:18 AM, Geert Uytterhoeven
>> <geert@linux-m68k.org> wrote:
>>> On Thu, Feb 20, 2014 at 4:48 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> Since only MSIOF1 is used on Lager (correct me if i'm wrong), isn't it
>>>> best to omit the unused resources from above? In case of DT I think it
>>>> makes sense to define all channels in the SoC.dtsi and let the
>>>> SoC-board.dts just enable the channels that are used. But in this case
>>>> with legacy code I think we should keep thing simple and small and
>>>> just enable the bits that are used on the particular board.
>>>>
>>>> The same obviously applies to the Koelsch legacy code as well. =)
>>>
>>> Note that while all resources are present, only MSIOF1 is registered on
>>> Lager (MSIOF0 on Koelsch). This is similar to i2c on Koelsch, which also
>>> has all resources, but only registers active devices.
>>
>> Ok, I understand. Thanks for brining this to my attention.
>>
>> I'd like to avoid having unused resources so I'll cook up a patch to
>> rework that myself.
>>
>>> It's your preference, though, so I can adapt if you want.
>>
>> Thanks.
>>
>> Please rework this patch to only register a single MSIOF channel. I
>> think it makes sense to only enable hardware that is being used.
>
> Ehrm, I already register a single MSIOF channel only.
> Perhaps you mean't "remove the unused resources"?
Yes, exactly. My apologies for the unclear reply.
>> Another question: How about "bus_num" and the platform device id
>> mapping? I'd like them to be the same if possible, but you are having
>> this "(idx+1)" bit in your code which I assume is to add offset for
>> the QSPI bus.
>
> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
> of e.g. "spi_r8a7790_msiof.1").
> It's used for matching SPI slaves in spi_board_info with SPI masters.
> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
> bus_num 1 to 4, hence the "idx+1", and the platform device names
> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>
> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
> on all SoCs with MSIOF.)
Yeah, the bus number that is commonly used for SPI and I2C behaves
like that so I agree with what you're saying. I guess historically we
usually only have one I2C master and one SPI master which makes it
easy to use direct mapping between bus num and pdev->id.
Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
I'm mistaken), so the question is how to allocate the ranges of
bus_num for each SPI master. I believe your current allocation works
well but I'm a bit confused by it I must confess.
I'm used to one of the two schemes:
1) single master with pdev->id equals bus_num
2) compact board specific bus allocation
I believe you introduce something similar to 1) but for two SPI
masters which is totally fine! For some unknown reason I expected 2)
with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
allocation scheme is reusable across multiple boards with the same SoC
so I think your current code is better when I think about it a bit
more.
> With DT, all of this doesn't matter, and life is easier, as the SPI slaves
> are child nodes of the SPI masters and thus don't need numerical bus
> references. So MSIOF0 can be called "msiof0" there.
> We still have the offsets in the "spi%u" aliases, though.
Right all this goes away with DT which is nice.
>> Regarding the PFC configuration, can you please double check that the
>> PIN_MAP_MUX_GROUP_DEFAULT() is in sync with the platform device id? Is
>> it the "bus_num" or the platform device id that is being used in case
>> of SPI?
>
> "bus_num" is SPI-specific. Pinctrl uses the actual device's name:
>
> /**
> * struct pinctrl_map - boards/machines shall provide this map for devices
> * @dev_name: the name of the device using this specific mapping, the name
> * must be the same as in your struct device*. If this name is set to the
> * same name as the pin controllers own dev_name(), the map entry will be
> * hogged by the driver itself upon registration
Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
I now understand that it is your intentional design to have bus_num 0
as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
It just takes some time for me to grasp. =)
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
2014-02-24 8:44 ` Magnus Damm
(?)
@ 2014-02-24 9:07 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 9:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Mon, Feb 24, 2014 at 9:44 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Another question: How about "bus_num" and the platform device id
>>> mapping? I'd like them to be the same if possible, but you are having
>>> this "(idx+1)" bit in your code which I assume is to add offset for
>>> the QSPI bus.
>>
>> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
>> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
>> of e.g. "spi_r8a7790_msiof.1").
>> It's used for matching SPI slaves in spi_board_info with SPI masters.
>> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
>> bus_num 1 to 4, hence the "idx+1", and the platform device names
>> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>>
>> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
>> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
>> on all SoCs with MSIOF.)
>
> Yeah, the bus number that is commonly used for SPI and I2C behaves
> like that so I agree with what you're saying. I guess historically we
> usually only have one I2C master and one SPI master which makes it
> easy to use direct mapping between bus num and pdev->id.
>
> Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
> I'm mistaken), so the question is how to allocate the ranges of
> bus_num for each SPI master. I believe your current allocation works
> well but I'm a bit confused by it I must confess.
>
> I'm used to one of the two schemes:
> 1) single master with pdev->id equals bus_num
> 2) compact board specific bus allocation
>
> I believe you introduce something similar to 1) but for two SPI
> masters which is totally fine! For some unknown reason I expected 2)
> with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
> allocation scheme is reusable across multiple boards with the same SoC
> so I think your current code is better when I think about it a bit
> more.
On our specific boards, we now have a sparse SPI bus numbering,
but that's just because some MSIOF channels are not used. On other
boards with the same SoC that may be different.
> Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
> I now understand that it is your intentional design to have bus_num 0
> as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
Actually that's too much credit for me: the bus numbering came from the
BSP through Yoshii-san.
> It just takes some time for me to grasp. =)
Yes, we're too used to having one single type of each hardware type :-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 9:07 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 9:07 UTC (permalink / raw)
To: Magnus Damm
Cc: Simon Horman, SH-Linux, linux-arm-kernel, linux-kernel,
Geert Uytterhoeven
Hi Magnus,
On Mon, Feb 24, 2014 at 9:44 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Another question: How about "bus_num" and the platform device id
>>> mapping? I'd like them to be the same if possible, but you are having
>>> this "(idx+1)" bit in your code which I assume is to add offset for
>>> the QSPI bus.
>>
>> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
>> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
>> of e.g. "spi_r8a7790_msiof.1").
>> It's used for matching SPI slaves in spi_board_info with SPI masters.
>> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
>> bus_num 1 to 4, hence the "idx+1", and the platform device names
>> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>>
>> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
>> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
>> on all SoCs with MSIOF.)
>
> Yeah, the bus number that is commonly used for SPI and I2C behaves
> like that so I agree with what you're saying. I guess historically we
> usually only have one I2C master and one SPI master which makes it
> easy to use direct mapping between bus num and pdev->id.
>
> Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
> I'm mistaken), so the question is how to allocate the ranges of
> bus_num for each SPI master. I believe your current allocation works
> well but I'm a bit confused by it I must confess.
>
> I'm used to one of the two schemes:
> 1) single master with pdev->id equals bus_num
> 2) compact board specific bus allocation
>
> I believe you introduce something similar to 1) but for two SPI
> masters which is totally fine! For some unknown reason I expected 2)
> with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
> allocation scheme is reusable across multiple boards with the same SoC
> so I think your current code is better when I think about it a bit
> more.
On our specific boards, we now have a sparse SPI bus numbering,
but that's just because some MSIOF channels are not used. On other
boards with the same SoC that may be different.
> Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
> I now understand that it is your intentional design to have bus_num 0
> as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
Actually that's too much credit for me: the bus numbering came from the
BSP through Yoshii-san.
> It just takes some time for me to grasp. =)
Yes, we're too used to having one single type of each hardware type :-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support
@ 2014-02-24 9:07 ` Geert Uytterhoeven
0 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-02-24 9:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Mon, Feb 24, 2014 at 9:44 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> Another question: How about "bus_num" and the platform device id
>>> mapping? I'd like them to be the same if possible, but you are having
>>> this "(idx+1)" bit in your code which I assume is to add offset for
>>> the QSPI bus.
>>
>> "bus_num" is the SPI-specific numbering of SPI masters, which is filled
>> in by spi-sh-msiof.c based on platform_device.id (i.e. the numeric suffix
>> of e.g. "spi_r8a7790_msiof.1").
>> It's used for matching SPI slaves in spi_board_info with SPI masters.
>> As QSPI ("qspi.0") has SPI bus_num 0, the MSIOF SPI masters use
>> bus_num 1 to 4, hence the "idx+1", and the platform device names
>> "spi_r8a7790_msiof.1" to "spi_r8a7790_msiof.4".
>>
>> (Can't spi-sh-msiof.c use "bus_num = pdev->id + 1", so we can have
>> MSIOF0 as "spi_r8a7790_msiof.0"? No, as that would impact numbering
>> on all SoCs with MSIOF.)
>
> Yeah, the bus number that is commonly used for SPI and I2C behaves
> like that so I agree with what you're saying. I guess historically we
> usually only have one I2C master and one SPI master which makes it
> easy to use direct mapping between bus num and pdev->id.
>
> Now on Lager we have multiple SPI masters (both QSPI and MSIOF unless
> I'm mistaken), so the question is how to allocate the ranges of
> bus_num for each SPI master. I believe your current allocation works
> well but I'm a bit confused by it I must confess.
>
> I'm used to one of the two schemes:
> 1) single master with pdev->id equals bus_num
> 2) compact board specific bus allocation
>
> I believe you introduce something similar to 1) but for two SPI
> masters which is totally fine! For some unknown reason I expected 2)
> with bus_num 0 for QSPI and bus_num 1 for MSIOF1, but I think your
> allocation scheme is reusable across multiple boards with the same SoC
> so I think your current code is better when I think about it a bit
> more.
On our specific boards, we now have a sparse SPI bus numbering,
but that's just because some MSIOF channels are not used. On other
boards with the same SoC that may be different.
> Right. I was just confused seeing the pdev->id set to 2 on MSIOF1, but
> I now understand that it is your intentional design to have bus_num 0
> as QSPI, bus_num1 as unused MSIOF0 and bus_num 2 as MSIOF1.
Actually that's too much credit for me: the bus numbering came from the
BSP through Yoshii-san.
> It just takes some time for me to grasp. =)
Yes, we're too used to having one single type of each hardware type :-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
@ 2014-02-25 9:22 ` Linus Walleij
-1 siblings, 0 replies; 62+ messages in thread
From: Linus Walleij @ 2014-02-25 9:22 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 20, 2014 at 3:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Patch applied with Laurent's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-25 9:22 ` Linus Walleij
0 siblings, 0 replies; 62+ messages in thread
From: Linus Walleij @ 2014-02-25 9:22 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, Magnus Damm, linux-sh, linux-arm-kernel,
linux-kernel, Geert Uytterhoeven, Laurent Pinchart
On Thu, Feb 20, 2014 at 3:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Patch applied with Laurent's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name
@ 2014-02-25 9:22 ` Linus Walleij
0 siblings, 0 replies; 62+ messages in thread
From: Linus Walleij @ 2014-02-25 9:22 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 20, 2014 at 3:49 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
>
> Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM:
> shmobile: r8a7791: Add MSIOF clocks in device tree").
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Patch applied with Laurent's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH 02/11] ARM: shmobile: r8a7790: Add Audio DMAC peri peri devices to DT
2014-02-20 14:49 ` Geert Uytterhoeven
(?)
(?)
@ 2014-10-30 8:26 ` Kuninori Morimoto
-1 siblings, 0 replies; 62+ messages in thread
From: Kuninori Morimoto @ 2014-10-30 8:26 UTC (permalink / raw)
To: linux-sh
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Instantiate the Audio DMAC peri peri controllers
in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/boot/dts/r8a7790.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a7c1338..f5cc4d6 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -369,6 +369,13 @@
dma-channels = <13>;
};
+ audmapp: audio-dma-pp@0xec740000 {
+ compatible = "renesas,rcar-audmapp";
+ #dma-cells = <1>;
+
+ reg = <0 0xec740000 0 0x200>;
+ };
+
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH 02/11] ARM: shmobile: r8a7790: Add Audio DMAC peri peri devices to DT
2014-02-20 14:49 ` Geert Uytterhoeven
` (2 preceding siblings ...)
(?)
@ 2014-10-30 9:35 ` Geert Uytterhoeven
-1 siblings, 0 replies; 62+ messages in thread
From: Geert Uytterhoeven @ 2014-10-30 9:35 UTC (permalink / raw)
To: linux-sh
On Thu, Oct 30, 2014 at 9:26 AM, Kuninori Morimoto
<kuninori.morimoto.gx@gmail.com> wrote:
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -369,6 +369,13 @@
> dma-channels = <13>;
> };
>
> + audmapp: audio-dma-pp@0xec740000 {
Please remove the "0x" prefix from the unit-address.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 62+ messages in thread
end of thread, other threads:[~2014-10-30 9:35 UTC | newest]
Thread overview: 62+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-02-20 14:49 [PATCH 00/11] ARM: shmobile: MSIOF integration on r8a7790/lager and r8a7791/koelsch Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 01/11] ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output name Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 23:24 ` Laurent Pinchart
2014-02-20 23:24 ` Laurent Pinchart
2014-02-20 23:24 ` Laurent Pinchart
2014-02-25 9:22 ` Linus Walleij
2014-02-25 9:22 ` Linus Walleij
2014-02-25 9:22 ` Linus Walleij
2014-02-20 14:49 ` [PATCH 02/11] ARM: shmobile: r8a7790: Add MSIOF clocks Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-10-30 8:26 ` [PATCH 02/11] ARM: shmobile: r8a7790: Add Audio DMAC peri peri devices to DT Kuninori Morimoto
2014-10-30 9:35 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 03/11] ARM: shmobile: r8a7791: Add MSIOF clocks Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 04/11] ARM: shmobile: lager legacy: Add MSIOF support Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 15:48 ` Magnus Damm
2014-02-20 15:48 ` Magnus Damm
2014-02-20 15:48 ` Magnus Damm
2014-02-20 16:18 ` Geert Uytterhoeven
2014-02-20 16:18 ` Geert Uytterhoeven
2014-02-20 16:18 ` Geert Uytterhoeven
2014-02-24 2:09 ` Magnus Damm
2014-02-24 2:09 ` Magnus Damm
2014-02-24 2:09 ` Magnus Damm
2014-02-24 8:25 ` Geert Uytterhoeven
2014-02-24 8:25 ` Geert Uytterhoeven
2014-02-24 8:25 ` Geert Uytterhoeven
2014-02-24 8:44 ` Magnus Damm
2014-02-24 8:44 ` Magnus Damm
2014-02-24 8:44 ` Magnus Damm
2014-02-24 9:07 ` Geert Uytterhoeven
2014-02-24 9:07 ` Geert Uytterhoeven
2014-02-24 9:07 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 05/11] ARM: shmobile: koelsch " Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 07/11] ARM: shmobile: r8a7791/koelsch " Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 09/11] ARM: shmobile: r8a7791 " Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 10/11] ARM: shmobile: lager dts: Add MSIOF nodes Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` [PATCH 11/11] ARM: shmobile: koelsch " Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
2014-02-20 14:49 ` Geert Uytterhoeven
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