[PATCH v2 0/6] xen/arm: Remove processor specific bits in Xen code

[PATCH v2 0/6] xen/arm: Remove processor specific bits in Xen code

[Julien Grall]

Hello,

This patch series aims to remove Cortex A15 specific bits in common code.

To achieve it, the serie introduces specific processor callbacks which will
be called at least during VCPU initialisation. In the future, the structure
can be easily extented to support new specific callback.

This patch series also:
    - rename some function/define to avoid misuse when new processor will be
    supported
    - remove xen/include/asm-arm/processor-ca{15,7}.h which are not used
    by Xen

Sincerely yours,

Julien Grall (6):
  xen/arm32: proc-v7.S: Rename v7_init and ACTLR_V7_SMP
  xen/arm32: head.S: Remove CA15 and CA7 specific includes
  xen/arm32: Introduce lookup_processor_type
  xen/arm64: Implement lookup_processor_type as a dummy function
  xen/arm: Remove processor specific setup in vcpu_initialise
  xen/arm: Remove asm-arm/processor-ca{15,7}.h headers

 xen/arch/arm/Makefile                 |  1 +
 xen/arch/arm/arm32/Makefile           |  2 +-
 xen/arch/arm/arm32/head.S             | 59 +++++++++++++++++++++++++----------
 xen/arch/arm/arm32/proc-caxx.c        | 35 +++++++++++++++++++++
 xen/arch/arm/arm32/proc-v7.S          | 15 ++++++---
 xen/arch/arm/arm64/head.S             |  7 +++++
 xen/arch/arm/domain.c                 |  8 ++---
 xen/arch/arm/processor.c              | 49 +++++++++++++++++++++++++++++
 xen/arch/arm/setup.c                  |  3 ++
 xen/include/asm-arm/arm32/processor.h |  2 +-
 xen/include/asm-arm/processor-ca15.h  | 42 -------------------------
 xen/include/asm-arm/processor-ca7.h   | 20 ------------
 xen/include/asm-arm/procinfo.h        | 17 ++++++++--
 13 files changed, 167 insertions(+), 93 deletions(-)
 create mode 100644 xen/arch/arm/arm32/proc-caxx.c
 create mode 100644 xen/arch/arm/processor.c
 delete mode 100644 xen/include/asm-arm/processor-ca15.h
 delete mode 100644 xen/include/asm-arm/processor-ca7.h

-- 
1.8.5.3

[PATCH v2 1/6] xen/arm32: proc-v7.S: Rename v7_init and ACTLR_V7_SMP

[Julien Grall]

The function v7_init and the define ACTLR_V7_SMP are Cortex A15/A7
specific.

To avoid misuse when new ARMv7 processors will be supported, create one
label per processor type and rename ACTLR_V7_SMP in ACTRL_CAXX_SMP

---
    Changes in v2:
        - Patch added
---
 xen/arch/arm/arm32/proc-v7.S          | 12 +++++++-----
 xen/include/asm-arm/arm32/processor.h |  2 +-
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S
index 2c8cb9c..8fb42db 100644
--- a/xen/arch/arm/arm32/proc-v7.S
+++ b/xen/arch/arm/arm32/proc-v7.S
@@ -20,10 +20,12 @@
 #include <asm/asm_defns.h>
 #include <asm/arm32/processor.h>
 
-v7_init:
+ca15mp_init:
+ca7mp_init:
+brahma15mp_init:
         /* Set up the SMP bit in ACTLR */
         mrc   CP32(r0, ACTLR)
-        orr   r0, r0, #(ACTLR_V7_SMP) /* enable SMP bit */
+        orr   r0, r0, #(ACTLR_CAXX_SMP) /* enable SMP bit */
         mcr   CP32(r0, ACTLR)
         mov   pc, lr
 
@@ -32,7 +34,7 @@ v7_init:
 __v7_ca15mp_proc_info:
         .long 0x410FC0F0             /* Cortex-A15 */
         .long 0xFF0FFFF0             /* Mask */
-        .long v7_init
+        .long ca15mp_init
         .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
 
         .section ".init.proc.info", #alloc, #execinstr
@@ -40,7 +42,7 @@ __v7_ca15mp_proc_info:
 __v7_ca7mp_proc_info:
         .long 0x410FC070             /* Cortex-A7 */
         .long 0xFF0FFFF0             /* Mask */
-        .long v7_init
+        .long ca7mp_init
         .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
 
         .section ".init.proc.info", #alloc, #execinstr
@@ -48,7 +50,7 @@ __v7_ca7mp_proc_info:
 __v7_brahma15mp_proc_info:
         .long 0x420F00F2             /* Broadcom Brahma-B15 */
         .long 0xFF0FFFFF             /* Mask */
-        .long v7_init
+        .long brahma15mp_init
         .size __v7_brahma15mp_proc_info, . - __v7_brahma15mp_proc_info
 
 /*
diff --git a/xen/include/asm-arm/arm32/processor.h b/xen/include/asm-arm/arm32/processor.h
index d1b89d0..8a35cee 100644
--- a/xen/include/asm-arm/arm32/processor.h
+++ b/xen/include/asm-arm/arm32/processor.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_ARM_ARM32_PROCESSOR_H
 #define __ASM_ARM_ARM32_PROCESSOR_H
 
-#define ACTLR_V7_SMP    (1<<6)
+#define ACTLR_CAXX_SMP      (1<<6)
 
 #ifndef __ASSEMBLY__
 /* On stack VCPU state */
-- 
1.8.5.3

[PATCH v2 2/6] xen/arm32: head.S: Remove CA15 and CA7 specific includes

[Julien Grall]

head.S only contains generic code. It should not include headers for a
specific processor.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---
 xen/arch/arm/arm32/head.S | 2 --
 1 file changed, 2 deletions(-)

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 1b1801b..77f5518 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -19,8 +19,6 @@
 
 #include <asm/config.h>
 #include <asm/page.h>
-#include <asm/processor-ca15.h>
-#include <asm/processor-ca7.h>
 #include <asm/asm_defns.h>
 #include <asm/early_printk.h>
 
-- 
1.8.5.3

[PATCH v2 3/6] xen/arm32: Introduce lookup_processor_type

[Julien Grall]

Looking for a specific proc_info structure is already implemented in assembly.
Implement lookup_processor_type to avoid duplicate code between C and
assembly.

This function searches the proc_info_list structure following the processor
ID. If the search fail, it will return NULL, otherwise a pointer to this
structure for the specific processor.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---
 xen/arch/arm/arm32/head.S | 57 +++++++++++++++++++++++++++++++++++------------
 1 file changed, 43 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 77f5518..68fb499 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -198,26 +198,16 @@ skip_bss:
         PRINT("- Setting up control registers -\r\n")
 
         /* Get processor specific proc info into r1 */
-        mrc   CP32(r0, MIDR)                /* r0 := our cpu id */
-        ldr   r1, = __proc_info_start
-        add   r1, r1, r10                   /* r1 := paddr of table (start) */
-        ldr   r2, = __proc_info_end
-        add   r2, r2, r10                   /* r2 := paddr of table (end) */
-1:      ldr   r3, [r1, #PROCINFO_cpu_mask]
-        and   r4, r0, r3                    /* r4 := our cpu id with mask */
-        ldr   r3, [r1, #PROCINFO_cpu_val]   /* r3 := cpu val in current proc info */
-        teq   r4, r3
-        beq   2f                            /* Match => exit, or try next proc info */
-        add   r1, r1, #PROCINFO_sizeof
-        cmp   r1, r2
-        blo   1b
+        bl    __lookup_processor_type
+        teq   r1, #0
+        bne   1f
         mov   r4, r0
         PRINT("- Missing processor info: ")
         mov   r0, r4
         bl    putn
         PRINT(" -\r\n")
         b     fail
-2:
+1:
 
         /* Jump to cpu_init */
         ldr   r1, [r1, #PROCINFO_cpu_init]  /* r1 := vaddr(init func) */
@@ -545,6 +535,45 @@ putn:   mov   pc, lr
 
 #endif /* !CONFIG_EARLY_PRINTK */
 
+/* This provides a C-API version of __lookup_processor_type */
+GLOBAL(lookup_processor_type)
+        stmfd sp!, {r4, r10, lr}
+        mov   r10, #0                   /* r10 := offset between virt&phys */
+        bl    __lookup_processor_type
+        mov r0, r1
+        ldmfd sp!, {r4, r10, pc}
+
+/* Read processor ID register (CP#15, CR0), and Look up in the linker-built
+ * supported processor list. Note that we can't use the absolute addresses for
+ * the __proc_info lists since we aren't running with the MMU on (and therefore,
+ * we are not in correct address space). We have to calculate the offset.
+ *
+ * r10: offset between virt&phys
+ *
+ * Returns:
+ * r0: CPUID
+ * r1: proc_info pointer
+ * Clobbers r2-r4
+ */
+__lookup_processor_type:
+        mrc   CP32(r0, MIDR)                /* r0 := our cpu id */
+        ldr   r1, = __proc_info_start
+        add   r1, r1, r10                   /* r1 := paddr of table (start) */
+        ldr   r2, = __proc_info_end
+        add   r2, r2, r10                   /* r2 := paddr of table (end) */
+1:      ldr   r3, [r1, #PROCINFO_cpu_mask]
+        and   r4, r0, r3                    /* r4 := our cpu id with mask */
+        ldr   r3, [r1, #PROCINFO_cpu_val]   /* r3 := cpu val in current proc info */
+        teq   r4, r3
+        beq   2f                            /* Match => exit, or try next proc info */
+        add   r1, r1, #PROCINFO_sizeof
+        cmp   r1, r2
+        blo   1b
+        /* We failed to find the proc_info, return NULL */
+        mov   r1, #0
+2:
+        mov   pc, lr
+
 /*
  * Local variables:
  * mode: ASM
-- 
1.8.5.3

[PATCH v2 4/6] xen/arm64: Implement lookup_processor_type as a dummy function

[Julien Grall]

ARM64 implementation doesn't yet have specific code per processor.
This function will be used in a later patch.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian campbell <ian.campbell@citrix.com>
---
 xen/arch/arm/arm64/head.S | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index c97c194..e1d3103 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -546,6 +546,13 @@ putn:   ret
 
 #endif /* !CONFIG_EARLY_PRINTK */
 
+/* This provides a C-API version of __lookup_processor_type
+ * TODO: For now, the implementation return NULL every time
+ */
+GLOBAL(lookup_processor_type)
+        mov  x0, #0
+        ret
+
 /*
  * Local variables:
  * mode: ASM
-- 
1.8.5.3

[PATCH v2 5/6] xen/arm: Remove processor specific setup in vcpu_initialise

[Julien Grall]

This patch introduces the possibility to have specific processor callbacks
that can be called in various place.

Currently VCPU initialisation code contains processor specific setup (for
Cortex A7 and Cortex A15) for the ACTRL registers. It's possible to have
processor with a different layout for this register.

Move this setup in a specific callback for ARM v7 processor.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Cc: marc.ceeeee@gmail.com

---
    Changes in v2:
        - Rename proc-v7-c.c in proc-caxx.c
        - s/initialize/initialise/ to uniformize with the other name in
        Xen
        - define ACTLR_SMP in proc-caxx.c and remove ACTLR_V7_SMP in the
        hearders
Marc, IIIRC you said that Broadcom Brahma-15 is compatible Cortex-A15.
Can you check this patch is valid for this processor?
---
 xen/arch/arm/Makefile          |  1 +
 xen/arch/arm/arm32/Makefile    |  2 +-
 xen/arch/arm/arm32/proc-caxx.c | 35 ++++++++++++++++++++++++++++++
 xen/arch/arm/arm32/proc-v7.S   |  3 +++
 xen/arch/arm/domain.c          |  8 ++-----
 xen/arch/arm/processor.c       | 49 ++++++++++++++++++++++++++++++++++++++++++
 xen/arch/arm/setup.c           |  3 +++
 xen/include/asm-arm/procinfo.h | 17 +++++++++++++--
 8 files changed, 109 insertions(+), 9 deletions(-)
 create mode 100644 xen/arch/arm/arm32/proc-caxx.c
 create mode 100644 xen/arch/arm/processor.c

diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index d70f6d5..63e0460 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -32,6 +32,7 @@ obj-y += vuart.o
 obj-y += hvm.o
 obj-y += device.o
 obj-y += decode.o
+obj-y += processor.o
 
 #obj-bin-y += ....o
 
diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 65ecff4..df0e7de 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -1,7 +1,7 @@
 subdir-y += lib
 
 obj-y += entry.o
-obj-y += proc-v7.o
+obj-y += proc-v7.o proc-caxx.o
 
 obj-y += traps.o
 obj-y += domain.o
diff --git a/xen/arch/arm/arm32/proc-caxx.c b/xen/arch/arm/arm32/proc-caxx.c
new file mode 100644
index 0000000..9166a1d
--- /dev/null
+++ b/xen/arch/arm/arm32/proc-caxx.c
@@ -0,0 +1,35 @@
+/*
+ * xen/arch/arm/arm32/proc-caxx.c
+ *
+ * arm V7 Cortex A15 and A7 initialisation
+ *
+ * Julien Grall <julien.grall@linaro.org>
+ * Copyright (c) 2014 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <asm/procinfo.h>
+#include <asm/processor.h>
+
+#define ACTLR_SMP (1 << 6)
+
+static void caxx_vcpu_initialise(struct vcpu *v)
+{
+    /* If the guest has more 1 VCPU, enable the SMP bit in ACTLR */
+    if ( v->domain->max_vcpus > 1 )
+        v->arch.actlr |= ACTLR_SMP;
+    else
+        v->arch.actlr &= ~ACTLR_SMP;
+}
+
+const struct processor caxx_processor = {
+    .vcpu_initialise = caxx_vcpu_initialise,
+};
diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S
index 8fb42db..b0d5343 100644
--- a/xen/arch/arm/arm32/proc-v7.S
+++ b/xen/arch/arm/arm32/proc-v7.S
@@ -35,6 +35,7 @@ __v7_ca15mp_proc_info:
         .long 0x410FC0F0             /* Cortex-A15 */
         .long 0xFF0FFFF0             /* Mask */
         .long ca15mp_init
+        .long caxx_processor
         .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
 
         .section ".init.proc.info", #alloc, #execinstr
@@ -43,6 +44,7 @@ __v7_ca7mp_proc_info:
         .long 0x410FC070             /* Cortex-A7 */
         .long 0xFF0FFFF0             /* Mask */
         .long ca7mp_init
+        .long caxx_processor
         .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
 
         .section ".init.proc.info", #alloc, #execinstr
@@ -51,6 +53,7 @@ __v7_brahma15mp_proc_info:
         .long 0x420F00F2             /* Broadcom Brahma-B15 */
         .long 0xFF0FFFFF             /* Mask */
         .long brahma15mp_init
+        .long caxx_processor
         .size __v7_brahma15mp_proc_info, . - __v7_brahma15mp_proc_info
 
 /*
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 8f20fdf..82a1e79 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -28,7 +28,7 @@
 #include <asm/irq.h>
 #include <asm/cpufeature.h>
 #include <asm/vfp.h>
-#include <asm/processor-ca15.h>
+#include <asm/procinfo.h>
 
 #include <asm/gic.h>
 #include <asm/platform.h>
@@ -480,11 +480,7 @@ int vcpu_initialise(struct vcpu *v)
 
     v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
 
-    /* XXX: Handle other than CA15 cpus */
-    if ( v->domain->max_vcpus > 1 )
-        v->arch.actlr |= ACTLR_CA15_SMP;
-    else
-        v->arch.actlr &= ~ACTLR_CA15_SMP;
+    processor_vcpu_initialise(v);
 
     if ( (rc = vcpu_vgic_init(v)) != 0 )
         return rc;
diff --git a/xen/arch/arm/processor.c b/xen/arch/arm/processor.c
new file mode 100644
index 0000000..8c425ce
--- /dev/null
+++ b/xen/arch/arm/processor.c
@@ -0,0 +1,49 @@
+/*
+ * xen/arch/arm/processor.c
+ *
+ * Helpers to execute processor specific code.
+ *
+ * Julien Grall <julien.grall@linaro.org>
+ * Copyright (C) 2014 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <asm/procinfo.h>
+
+static const struct processor *processor = NULL;
+
+void __init processor_setup(void)
+{
+    const struct proc_info_list *procinfo;
+
+    procinfo = lookup_processor_type();
+    if ( !procinfo )
+        return;
+
+    processor = procinfo->processor;
+}
+
+void processor_vcpu_initialise(struct vcpu *v)
+{
+    if ( !processor || !processor->vcpu_initialise )
+        return;
+
+    processor->vcpu_initialise(v);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 1f6d713..5529cb1 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -42,6 +42,7 @@
 #include <asm/gic.h>
 #include <asm/cpufeature.h>
 #include <asm/platform.h>
+#include <asm/procinfo.h>
 
 struct cpuinfo_arm __read_mostly boot_cpu_data;
 
@@ -148,6 +149,8 @@ static void __init processor_id(void)
     {
         printk("32-bit Execution: Unsupported\n");
     }
+
+    processor_setup();
 }
 
 static void dt_unreserved_regions(paddr_t s, paddr_t e,
diff --git a/xen/include/asm-arm/procinfo.h b/xen/include/asm-arm/procinfo.h
index 9d3feb7..26306b3 100644
--- a/xen/include/asm-arm/procinfo.h
+++ b/xen/include/asm-arm/procinfo.h
@@ -21,10 +21,23 @@
 #ifndef __ASM_ARM_PROCINFO_H
 #define __ASM_ARM_PROCINFO_H
 
+#include <xen/sched.h>
+
+struct processor {
+    /* Initialize specific processor register for the new VPCU*/
+    void (*vcpu_initialise)(struct vcpu *v);
+};
+
 struct proc_info_list {
-	unsigned int		cpu_val;
-	unsigned int		cpu_mask;
+    unsigned int        cpu_val;
+    unsigned int        cpu_mask;
     void                (*cpu_init)(void);
+    struct processor    *processor;
 };
 
+const __init struct proc_info_list *lookup_processor_type(void);
+
+void __init processor_setup(void);
+void processor_vcpu_initialise(struct vcpu *v);
+
 #endif
-- 
1.8.5.3

[PATCH v2 6/6] xen/arm: Remove asm-arm/processor-ca{15, 7}.h headers

[Julien Grall]

Theses headers are not in the right directory and are not used anymore.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---
 xen/include/asm-arm/processor-ca15.h | 42 ------------------------------------
 xen/include/asm-arm/processor-ca7.h  | 20 -----------------
 2 files changed, 62 deletions(-)
 delete mode 100644 xen/include/asm-arm/processor-ca15.h
 delete mode 100644 xen/include/asm-arm/processor-ca7.h

diff --git a/xen/include/asm-arm/processor-ca15.h b/xen/include/asm-arm/processor-ca15.h
deleted file mode 100644
index f65f40a..0000000
--- a/xen/include/asm-arm/processor-ca15.h
+++ /dev/null
@@ -1,42 +0,0 @@
-#ifndef __ASM_ARM_PROCESSOR_CA15_H
-#define __ASM_ARM_PROCESSOR_CA15_H
-
-/* ACTLR Auxiliary Control Register, Cortex A15 */
-#define ACTLR_CA15_SNOOP_DELAYED      (1<<31)
-#define ACTLR_CA15_MAIN_CLOCK         (1<<30)
-#define ACTLR_CA15_NEON_CLOCK         (1<<29)
-#define ACTLR_CA15_NONCACHE           (1<<24)
-#define ACTLR_CA15_INORDER_REQ        (1<<23)
-#define ACTLR_CA15_INORDER_LOAD       (1<<22)
-#define ACTLR_CA15_L2_TLB_PREFETCH    (1<<21)
-#define ACTLR_CA15_L2_IPA_PA_CACHE    (1<<20)
-#define ACTLR_CA15_L2_CACHE           (1<<19)
-#define ACTLR_CA15_L2_PA_CACHE        (1<<18)
-#define ACTLR_CA15_TLB                (1<<17)
-#define ACTLR_CA15_STRONGY_ORDERED    (1<<16)
-#define ACTLR_CA15_INORDER            (1<<15)
-#define ACTLR_CA15_FORCE_LIM          (1<<14)
-#define ACTLR_CA15_CP_FLUSH           (1<<13)
-#define ACTLR_CA15_CP_PUSH            (1<<12)
-#define ACTLR_CA15_LIM                (1<<11)
-#define ACTLR_CA15_SER                (1<<10)
-#define ACTLR_CA15_OPT                (1<<9)
-#define ACTLR_CA15_WFI                (1<<8)
-#define ACTLR_CA15_WFE                (1<<7)
-#define ACTLR_CA15_SMP                (1<<6)
-#define ACTLR_CA15_PLD                (1<<5)
-#define ACTLR_CA15_IP                 (1<<4)
-#define ACTLR_CA15_MICRO_BTB          (1<<3)
-#define ACTLR_CA15_LOOP_ONE           (1<<2)
-#define ACTLR_CA15_LOOP_DISABLE       (1<<1)
-#define ACTLR_CA15_BTB                (1<<0)
-
-#endif /* __ASM_ARM_PROCESSOR_CA15_H */
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/include/asm-arm/processor-ca7.h b/xen/include/asm-arm/processor-ca7.h
deleted file mode 100644
index 5048a95..0000000
--- a/xen/include/asm-arm/processor-ca7.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __ASM_ARM_PROCESSOR_CA7_H
-#define __ASM_ARM_PROCESSOR_CA7_H
-
-/* ACTLR Auxiliary Control Register, Cortex A7 */
-#define ACTLR_CA7_DDI                 (1<<28)
-#define ACTLR_CA7_DDVM                (1<<15)
-#define ACTLR_CA7_L1RADIS             (1<<12)
-#define ACTLR_CA7_L2RADIS             (1<<11)
-#define ACTLR_CA7_DODMBS              (1<<10)
-#define ACTLR_CA7_SMP                 (1<<6)
-
-#endif /* __ASM_ARM_PROCESSOR_CA7_H */
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
-- 
1.8.5.3

Re: [PATCH v2 0/6] xen/arm: Remove processor specific bits in Xen code

[Tim Deegan]

At 12:46 +0800 on 05 Mar (1394019980), Julien Grall wrote:
> Hello,
> 
> This patch series aims to remove Cortex A15 specific bits in common code.
> 
> To achieve it, the serie introduces specific processor callbacks which will
> be called at least during VCPU initialisation. In the future, the structure
> can be easily extented to support new specific callback.
> 
> This patch series also:
>     - rename some function/define to avoid misuse when new processor will be
>     supported
>     - remove xen/include/asm-arm/processor-ca{15,7}.h which are not used
>     by Xen

Reviewed-by: Tim Deegan <tim@xen.org>

Re: [PATCH v2 1/6] xen/arm32: proc-v7.S: Rename v7_init and ACTLR_V7_SMP

[Ian Campbell]

On Wed, 2014-03-05 at 12:46 +0800, Julien Grall wrote:
> The function v7_init and the define ACTLR_V7_SMP are Cortex A15/A7
> specific.
> 
> To avoid misuse when new ARMv7 processors will be supported, create one
> label per processor type and rename ACTLR_V7_SMP in ACTRL_CAXX_SMP
> 
> ---
>     Changes in v2:
>         - Patch added

Missing an S-o-b though. You can supply one inline here though, no need
to resend.

> ---
>  xen/arch/arm/arm32/proc-v7.S          | 12 +++++++-----
>  xen/include/asm-arm/arm32/processor.h |  2 +-
>  2 files changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S
> index 2c8cb9c..8fb42db 100644
> --- a/xen/arch/arm/arm32/proc-v7.S
> +++ b/xen/arch/arm/arm32/proc-v7.S
> @@ -20,10 +20,12 @@
>  #include <asm/asm_defns.h>
>  #include <asm/arm32/processor.h>
>  
> -v7_init:
> +ca15mp_init:
> +ca7mp_init:
> +brahma15mp_init:
>          /* Set up the SMP bit in ACTLR */
>          mrc   CP32(r0, ACTLR)
> -        orr   r0, r0, #(ACTLR_V7_SMP) /* enable SMP bit */
> +        orr   r0, r0, #(ACTLR_CAXX_SMP) /* enable SMP bit */
>          mcr   CP32(r0, ACTLR)
>          mov   pc, lr
>  
> @@ -32,7 +34,7 @@ v7_init:
>  __v7_ca15mp_proc_info:
>          .long 0x410FC0F0             /* Cortex-A15 */
>          .long 0xFF0FFFF0             /* Mask */
> -        .long v7_init
> +        .long ca15mp_init
>          .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
>  
>          .section ".init.proc.info", #alloc, #execinstr
> @@ -40,7 +42,7 @@ __v7_ca15mp_proc_info:
>  __v7_ca7mp_proc_info:
>          .long 0x410FC070             /* Cortex-A7 */
>          .long 0xFF0FFFF0             /* Mask */
> -        .long v7_init
> +        .long ca7mp_init
>          .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
>  
>          .section ".init.proc.info", #alloc, #execinstr
> @@ -48,7 +50,7 @@ __v7_ca7mp_proc_info:
>  __v7_brahma15mp_proc_info:
>          .long 0x420F00F2             /* Broadcom Brahma-B15 */
>          .long 0xFF0FFFFF             /* Mask */
> -        .long v7_init
> +        .long brahma15mp_init
>          .size __v7_brahma15mp_proc_info, . - __v7_brahma15mp_proc_info
>  
>  /*
> diff --git a/xen/include/asm-arm/arm32/processor.h b/xen/include/asm-arm/arm32/processor.h
> index d1b89d0..8a35cee 100644
> --- a/xen/include/asm-arm/arm32/processor.h
> +++ b/xen/include/asm-arm/arm32/processor.h
> @@ -1,7 +1,7 @@
>  #ifndef __ASM_ARM_ARM32_PROCESSOR_H
>  #define __ASM_ARM_ARM32_PROCESSOR_H
>  
> -#define ACTLR_V7_SMP    (1<<6)
> +#define ACTLR_CAXX_SMP      (1<<6)
>  
>  #ifndef __ASSEMBLY__
>  /* On stack VCPU state */

Re: [PATCH v2 1/6] xen/arm32: proc-v7.S: Rename v7_init and ACTLR_V7_SMP

[Julien Grall]

On 03/12/2014 02:19 PM, Ian Campbell wrote:
> On Wed, 2014-03-05 at 12:46 +0800, Julien Grall wrote:
>> The function v7_init and the define ACTLR_V7_SMP are Cortex A15/A7
>> specific.
>>
>> To avoid misuse when new ARMv7 processors will be supported, create one
>> label per processor type and rename ACTLR_V7_SMP in ACTRL_CAXX_SMP
>>
>> ---
>>     Changes in v2:
>>         - Patch added
> 
> Missing an S-o-b though. You can supply one inline here though, no need
> to resend.

oops, sorry.

Signed-off-by: Julien Grall <julien.grall@linaro.org>

-- 
Julien Grall

Re: [PATCH v2 5/6] xen/arm: Remove processor specific setup in vcpu_initialise

[Ian Campbell]

On Wed, 2014-03-05 at 12:46 +0800, Julien Grall wrote:
> This patch introduces the possibility to have specific processor callbacks
> that can be called in various place.
> 
> Currently VCPU initialisation code contains processor specific setup (for
> Cortex A7 and Cortex A15) for the ACTRL registers. It's possible to have
> processor with a different layout for this register.
> 
> Move this setup in a specific callback for ARM v7 processor.
> 
> Signed-off-by: Julien Grall <julien.grall@linaro.org>
> Cc: marc.ceeeee@gmail.com

Acked-by: Ian Campbell <ian.campbell@citrix.com>

> ---
>     Changes in v2:
>         - Rename proc-v7-c.c in proc-caxx.c
>         - s/initialize/initialise/ to uniformize with the other name in
>         Xen
>         - define ACTLR_SMP in proc-caxx.c and remove ACTLR_V7_SMP in the
>         hearders
> Marc, IIIRC you said that Broadcom Brahma-15 is compatible Cortex-A15.
> Can you check this patch is valid for this processor?

I'm going to take silence as being golden when I come to apply this
(next time through my queue).

> ---
>  xen/arch/arm/Makefile          |  1 +
>  xen/arch/arm/arm32/Makefile    |  2 +-
>  xen/arch/arm/arm32/proc-caxx.c | 35 ++++++++++++++++++++++++++++++
>  xen/arch/arm/arm32/proc-v7.S   |  3 +++
>  xen/arch/arm/domain.c          |  8 ++-----
>  xen/arch/arm/processor.c       | 49 ++++++++++++++++++++++++++++++++++++++++++
>  xen/arch/arm/setup.c           |  3 +++
>  xen/include/asm-arm/procinfo.h | 17 +++++++++++++--
>  8 files changed, 109 insertions(+), 9 deletions(-)
>  create mode 100644 xen/arch/arm/arm32/proc-caxx.c
>  create mode 100644 xen/arch/arm/processor.c
> 
> diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
> index d70f6d5..63e0460 100644
> --- a/xen/arch/arm/Makefile
> +++ b/xen/arch/arm/Makefile
> @@ -32,6 +32,7 @@ obj-y += vuart.o
>  obj-y += hvm.o
>  obj-y += device.o
>  obj-y += decode.o
> +obj-y += processor.o
>  
>  #obj-bin-y += ....o
>  
> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
> index 65ecff4..df0e7de 100644
> --- a/xen/arch/arm/arm32/Makefile
> +++ b/xen/arch/arm/arm32/Makefile
> @@ -1,7 +1,7 @@
>  subdir-y += lib
>  
>  obj-y += entry.o
> -obj-y += proc-v7.o
> +obj-y += proc-v7.o proc-caxx.o
>  
>  obj-y += traps.o
>  obj-y += domain.o
> diff --git a/xen/arch/arm/arm32/proc-caxx.c b/xen/arch/arm/arm32/proc-caxx.c
> new file mode 100644
> index 0000000..9166a1d
> --- /dev/null
> +++ b/xen/arch/arm/arm32/proc-caxx.c
> @@ -0,0 +1,35 @@
> +/*
> + * xen/arch/arm/arm32/proc-caxx.c
> + *
> + * arm V7 Cortex A15 and A7 initialisation
> + *
> + * Julien Grall <julien.grall@linaro.org>
> + * Copyright (c) 2014 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include <asm/procinfo.h>
> +#include <asm/processor.h>
> +
> +#define ACTLR_SMP (1 << 6)
> +
> +static void caxx_vcpu_initialise(struct vcpu *v)
> +{
> +    /* If the guest has more 1 VCPU, enable the SMP bit in ACTLR */
> +    if ( v->domain->max_vcpus > 1 )
> +        v->arch.actlr |= ACTLR_SMP;
> +    else
> +        v->arch.actlr &= ~ACTLR_SMP;
> +}
> +
> +const struct processor caxx_processor = {
> +    .vcpu_initialise = caxx_vcpu_initialise,
> +};
> diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S
> index 8fb42db..b0d5343 100644
> --- a/xen/arch/arm/arm32/proc-v7.S
> +++ b/xen/arch/arm/arm32/proc-v7.S
> @@ -35,6 +35,7 @@ __v7_ca15mp_proc_info:
>          .long 0x410FC0F0             /* Cortex-A15 */
>          .long 0xFF0FFFF0             /* Mask */
>          .long ca15mp_init
> +        .long caxx_processor
>          .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
>  
>          .section ".init.proc.info", #alloc, #execinstr
> @@ -43,6 +44,7 @@ __v7_ca7mp_proc_info:
>          .long 0x410FC070             /* Cortex-A7 */
>          .long 0xFF0FFFF0             /* Mask */
>          .long ca7mp_init
> +        .long caxx_processor
>          .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
>  
>          .section ".init.proc.info", #alloc, #execinstr
> @@ -51,6 +53,7 @@ __v7_brahma15mp_proc_info:
>          .long 0x420F00F2             /* Broadcom Brahma-B15 */
>          .long 0xFF0FFFFF             /* Mask */
>          .long brahma15mp_init
> +        .long caxx_processor
>          .size __v7_brahma15mp_proc_info, . - __v7_brahma15mp_proc_info
>  
>  /*
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index 8f20fdf..82a1e79 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -28,7 +28,7 @@
>  #include <asm/irq.h>
>  #include <asm/cpufeature.h>
>  #include <asm/vfp.h>
> -#include <asm/processor-ca15.h>
> +#include <asm/procinfo.h>
>  
>  #include <asm/gic.h>
>  #include <asm/platform.h>
> @@ -480,11 +480,7 @@ int vcpu_initialise(struct vcpu *v)
>  
>      v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
>  
> -    /* XXX: Handle other than CA15 cpus */
> -    if ( v->domain->max_vcpus > 1 )
> -        v->arch.actlr |= ACTLR_CA15_SMP;
> -    else
> -        v->arch.actlr &= ~ACTLR_CA15_SMP;
> +    processor_vcpu_initialise(v);
>  
>      if ( (rc = vcpu_vgic_init(v)) != 0 )
>          return rc;
> diff --git a/xen/arch/arm/processor.c b/xen/arch/arm/processor.c
> new file mode 100644
> index 0000000..8c425ce
> --- /dev/null
> +++ b/xen/arch/arm/processor.c
> @@ -0,0 +1,49 @@
> +/*
> + * xen/arch/arm/processor.c
> + *
> + * Helpers to execute processor specific code.
> + *
> + * Julien Grall <julien.grall@linaro.org>
> + * Copyright (C) 2014 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include <asm/procinfo.h>
> +
> +static const struct processor *processor = NULL;
> +
> +void __init processor_setup(void)
> +{
> +    const struct proc_info_list *procinfo;
> +
> +    procinfo = lookup_processor_type();
> +    if ( !procinfo )
> +        return;
> +
> +    processor = procinfo->processor;
> +}
> +
> +void processor_vcpu_initialise(struct vcpu *v)
> +{
> +    if ( !processor || !processor->vcpu_initialise )
> +        return;
> +
> +    processor->vcpu_initialise(v);
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
> index 1f6d713..5529cb1 100644
> --- a/xen/arch/arm/setup.c
> +++ b/xen/arch/arm/setup.c
> @@ -42,6 +42,7 @@
>  #include <asm/gic.h>
>  #include <asm/cpufeature.h>
>  #include <asm/platform.h>
> +#include <asm/procinfo.h>
>  
>  struct cpuinfo_arm __read_mostly boot_cpu_data;
>  
> @@ -148,6 +149,8 @@ static void __init processor_id(void)
>      {
>          printk("32-bit Execution: Unsupported\n");
>      }
> +
> +    processor_setup();
>  }
>  
>  static void dt_unreserved_regions(paddr_t s, paddr_t e,
> diff --git a/xen/include/asm-arm/procinfo.h b/xen/include/asm-arm/procinfo.h
> index 9d3feb7..26306b3 100644
> --- a/xen/include/asm-arm/procinfo.h
> +++ b/xen/include/asm-arm/procinfo.h
> @@ -21,10 +21,23 @@
>  #ifndef __ASM_ARM_PROCINFO_H
>  #define __ASM_ARM_PROCINFO_H
>  
> +#include <xen/sched.h>
> +
> +struct processor {
> +    /* Initialize specific processor register for the new VPCU*/
> +    void (*vcpu_initialise)(struct vcpu *v);
> +};
> +
>  struct proc_info_list {
> -	unsigned int		cpu_val;
> -	unsigned int		cpu_mask;
> +    unsigned int        cpu_val;
> +    unsigned int        cpu_mask;
>      void                (*cpu_init)(void);
> +    struct processor    *processor;
>  };
>  
> +const __init struct proc_info_list *lookup_processor_type(void);
> +
> +void __init processor_setup(void);
> +void processor_vcpu_initialise(struct vcpu *v);
> +
>  #endif

Re: [PATCH v2 3/6] xen/arm32: Introduce lookup_processor_type

[Ian Campbell]

On Wed, 2014-03-05 at 12:46 +0800, Julien Grall wrote:@@ -545,6 +535,45
> #endif /* !CONFIG_EARLY_PRINTK */

I got a reject here because currently this reads /* EARLY_PRINTK */. I
presume this patch is in your queue after your other series but that
they are actually unrelated. On that assumption I intend to resolve the
conflict and commit... Let me know if I shouldn't do that!

Ian.

>  
> +/* This provides a C-API version of __lookup_processor_type */
> +GLOBAL(lookup_processor_type)
> +        stmfd sp!, {r4, r10, lr}
> +        mov   r10, #0                   /* r10 := offset between virt&phys */
> +        bl    __lookup_processor_type
> +        mov r0, r1
> +        ldmfd sp!, {r4, r10, pc}
> +
> +/* Read processor ID register (CP#15, CR0), and Look up in the linker-built
> + * supported processor list. Note that we can't use the absolute addresses for
> + * the __proc_info lists since we aren't running with the MMU on (and therefore,
> + * we are not in correct address space). We have to calculate the offset.
> + *
> + * r10: offset between virt&phys
> + *
> + * Returns:
> + * r0: CPUID
> + * r1: proc_info pointer
> + * Clobbers r2-r4
> + */
> +__lookup_processor_type:
> +        mrc   CP32(r0, MIDR)                /* r0 := our cpu id */
> +        ldr   r1, = __proc_info_start
> +        add   r1, r1, r10                   /* r1 := paddr of table (start) */
> +        ldr   r2, = __proc_info_end
> +        add   r2, r2, r10                   /* r2 := paddr of table (end) */
> +1:      ldr   r3, [r1, #PROCINFO_cpu_mask]
> +        and   r4, r0, r3                    /* r4 := our cpu id with mask */
> +        ldr   r3, [r1, #PROCINFO_cpu_val]   /* r3 := cpu val in current proc info */
> +        teq   r4, r3
> +        beq   2f                            /* Match => exit, or try next proc info */
> +        add   r1, r1, #PROCINFO_sizeof
> +        cmp   r1, r2
> +        blo   1b
> +        /* We failed to find the proc_info, return NULL */
> +        mov   r1, #0
> +2:
> +        mov   pc, lr
> +
>  /*
>   * Local variables:
>   * mode: ASM

Re: [PATCH v2 3/6] xen/arm32: Introduce lookup_processor_type

[Julien Grall]

Hi Ian,

On 03/14/2014 02:24 PM, Ian Campbell wrote:
> On Wed, 2014-03-05 at 12:46 +0800, Julien Grall wrote:@@ -545,6 +535,45
>> #endif /* !CONFIG_EARLY_PRINTK */
> 
> I got a reject here because currently this reads /* EARLY_PRINTK */. I
> presume this patch is in your queue after your other series but that
> they are actually unrelated. On that assumption I intend to resolve the
> conflict and commit... Let me know if I shouldn't do that!

There is no dependency between the both series. I should have rebase my series
before to send it, sorry.

You will find below the diff without the conflict.

Regards,

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index e889596..72cda34 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -198,26 +198,16 @@ skip_bss:
         PRINT("- Setting up control registers -\r\n")
 
         /* Get processor specific proc info into r1 */
-        mrc   CP32(r0, MIDR)                /* r0 := our cpu id */
-        ldr   r1, = __proc_info_start
-        add   r1, r1, r10                   /* r1 := paddr of table (start) */
-        ldr   r2, = __proc_info_end
-        add   r2, r2, r10                   /* r2 := paddr of table (end) */
-1:      ldr   r3, [r1, #PROCINFO_cpu_mask]
-        and   r4, r0, r3                    /* r4 := our cpu id with mask */
-        ldr   r3, [r1, #PROCINFO_cpu_val]   /* r3 := cpu val in current proc info */
-        teq   r4, r3
-        beq   2f                            /* Match => exit, or try next proc info */
-        add   r1, r1, #PROCINFO_sizeof
-        cmp   r1, r2
-        blo   1b
+        bl    __lookup_processor_type
+        teq   r1, #0
+        bne   1f
         mov   r4, r0
         PRINT("- Missing processor info: ")
         mov   r0, r4
         bl    putn
         PRINT(" -\r\n")
         b     fail
-2:
+1:
 
         /* Jump to cpu_init */
         ldr   r1, [r1, #PROCINFO_cpu_init]  /* r1 := vaddr(init func) */
@@ -545,6 +535,45 @@ putn:   mov   pc, lr
 
 #endif /* !EARLY_PRINTK */
 
+/* This provides a C-API version of __lookup_processor_type */
+GLOBAL(lookup_processor_type)
+        stmfd sp!, {r4, r10, lr}
+        mov   r10, #0                   /* r10 := offset between virt&phys */
+        bl    __lookup_processor_type
+        mov r0, r1
+        ldmfd sp!, {r4, r10, pc}
+
+/* Read processor ID register (CP#15, CR0), and Look up in the linker-built
+ * supported processor list. Note that we can't use the absolute addresses for
+ * the __proc_info lists since we aren't running with the MMU on (and therefore,
+ * we are not in correct address space). We have to calculate the offset.
+ *
+ * r10: offset between virt&phys
+ *
+ * Returns:
+ * r0: CPUID
+ * r1: proc_info pointer
+ * Clobbers r2-r4
+ */
+__lookup_processor_type:
+        mrc   CP32(r0, MIDR)                /* r0 := our cpu id */
+        ldr   r1, = __proc_info_start
+        add   r1, r1, r10                   /* r1 := paddr of table (start) */
+        ldr   r2, = __proc_info_end
+        add   r2, r2, r10                   /* r2 := paddr of table (end) */
+1:      ldr   r3, [r1, #PROCINFO_cpu_mask]
+        and   r4, r0, r3                    /* r4 := our cpu id with mask */
+        ldr   r3, [r1, #PROCINFO_cpu_val]   /* r3 := cpu val in current proc info */
+        teq   r4, r3
+        beq   2f                            /* Match => exit, or try next proc info */
+        add   r1, r1, #PROCINFO_sizeof
+        cmp   r1, r2
+        blo   1b
+        /* We failed to find the proc_info, return NULL */
+        mov   r1, #0
+2:
+        mov   pc, lr
+
 /*
  * Local variables:
  * mode: ASM

-- 
Julien Grall

Re: [PATCH v2 0/6] xen/arm: Remove processor specific bits in Xen code

[Ian Campbell]

On Thu, 2014-03-06 at 15:41 +0100, Tim Deegan wrote:
> At 12:46 +0800 on 05 Mar (1394019980), Julien Grall wrote:
> > Hello,
> > 
> > This patch series aims to remove Cortex A15 specific bits in common code.
> > 
> > To achieve it, the serie introduces specific processor callbacks which will
> > be called at least during VCPU initialisation. In the future, the structure
> > can be easily extented to support new specific callback.
> > 
> > This patch series also:
> >     - rename some function/define to avoid misuse when new processor will be
> >     supported
> >     - remove xen/include/asm-arm/processor-ca{15,7}.h which are not used
> >     by Xen
> 
> Reviewed-by: Tim Deegan <tim@xen.org>

Thanks, I added my own acks and applied.

Ian.