From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH v4 04/10] xen/arm: set GICH_HCR_UIE if all the LRs are in use Date: Fri, 21 Mar 2014 13:07:31 +0000 Message-ID: <1395407251.19839.53.camel@kazak.uk.xensource.com> References: <1395232325-19226-4-git-send-email-stefano.stabellini@eu.citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1395232325-19226-4-git-send-email-stefano.stabellini@eu.citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini Cc: julien.grall@citrix.com, jtd@galois.com, xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org On Wed, 2014-03-19 at 12:31 +0000, Stefano Stabellini wrote: > On return to guest, if there are no free LRs and we still have more > interrupt to inject, set GICH_HCR_UIE so that we are going to receive a > maintenance interrupt when no pending interrupts are present in the LR > registers. Should this go before the previous patch? Otherwise how to things work between #3 and #4? This would be harmless to go in first I think, apart from some spurious maintenance interrupts? > The maintenance interrupt handler won't do anything anymore, but > receiving the interrupt is going to cause gic_inject to be called on > return to guest that is going to clear the old LRs and inject new > interrupts. > > Signed-off-by: Stefano Stabellini > > --- > > Changes in v2: > - disable/enable the GICH_HCR_UIE bit in GICH_HCR; > - only enable GICH_HCR_UIE if this_cpu(lr_mask) == ((1 << nr_lrs) - 1). > --- > xen/arch/arm/gic.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 32d3bea..d445e8b 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -790,6 +790,12 @@ void gic_inject(void) > vgic_vcpu_inject_irq(current, current->domain->arch.evtchn_irq); > > gic_restore_pending_irqs(current); > + > + if ( !list_empty(¤t->arch.vgic.lr_pending) && > + this_cpu(lr_mask) == ((1 << nr_lrs) - 1) ) > + GICH[GICH_HCR] |= GICH_HCR_UIE; > + else > + GICH[GICH_HCR] &= ~GICH_HCR_UIE; > } > > int gic_route_irq_to_guest(struct domain *d, const struct dt_irq *irq,