[PATCH 0/5] drm/i915: Add the support of dual BSD rings on BDW GT3

[Zhao Yakui <yakui.zhao@intel.com>]

This is the patch set that tries to add the support of dual BSD rings on BDW
GT3. Based on hardware spec, the BDW GT3 has two independent BSD rings, which
can be used to process the video commands. To be simpler, it is transparent 
to user-space driver/middleware. In such case the kernel driver will decide
which ring is to dispatch the BSD video command.

As every BSD ring is powerful, it is enough to dispatch the BSD video command
based on the drm fd. In such case the different BSD ring is used for video playing
back and encoding. At the same time the coarse dispatch mechanism can help to avoid
the object synchronization between the BSD rings.


Zhao Yakui (5):
  drm/i915: Split the BDW device definition to prepare for dual BSD
    rings on BDW GT3
  drm/i915: Initialize the second BSD ring on BDW GT3 machine
  drm/i915: Handle the irq interrupt for the second BSD ring
  drm/i915: Add the VCS2 switch in Intel_ring_setup_status_page for Gen7 to
    remove the switch check warning
  drm/i915: Use the coarse mechanism based on drm fd to dispatch the BSD command
    on BDW GT3

 drivers/gpu/drm/i915/i915_dma.c            |   14 ++++++
 drivers/gpu/drm/i915/i915_drv.c            |   24 ++++++++-
 drivers/gpu/drm/i915/i915_drv.h            |    5 ++
 drivers/gpu/drm/i915/i915_gem.c            |    9 +++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   73 +++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_gpu_error.c      |    1 +
 drivers/gpu/drm/i915/i915_irq.c            |    5 +-
 drivers/gpu/drm/i915/i915_reg.h            |    1 +
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   57 ++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    6 ++-
 include/drm/i915_pciids.h                  |   10 ++--
 11 files changed, 197 insertions(+), 8 deletions(-)

-- 
1.7.10.1