From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYdZz-0002U2-CY for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WYdZu-0004Cp-J9 for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:23 -0400 Received: from mail-qc0-x22e.google.com ([2607:f8b0:400d:c01::22e]:46388) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYdZu-0004Ck-Cu for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:18 -0400 Received: by mail-qc0-f174.google.com with SMTP id c9so6110919qcz.33 for ; Fri, 11 Apr 2014 08:41:18 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Fri, 11 Apr 2014 08:40:13 -0700 Message-Id: <1397230827-24222-12-git-send-email-rth@twiddle.net> In-Reply-To: <1397230827-24222-1-git-send-email-rth@twiddle.net> References: <1397230827-24222-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 11/25] tcg-aarch64: Reuse LR in translated code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: claudio.fontana@huawei.com It's obviously call-clobbered, but is otherwise unused. Repurpose it as the TCG temporary. Reviewed-by: Claudio Fontana Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c | 34 ++++++++++++++++------------------ tcg/aarch64/tcg-target.h | 32 +++++++++++++++++--------------- 2 files changed, 33 insertions(+), 33 deletions(-) diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 48a246d..e36909e 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -23,10 +23,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%x0", "%x1", "%x2", "%x3", "%x4", "%x5", "%x6", "%x7", "%x8", "%x9", "%x10", "%x11", "%x12", "%x13", "%x14", "%x15", "%x16", "%x17", "%x18", "%x19", "%x20", "%x21", "%x22", "%x23", - "%x24", "%x25", "%x26", "%x27", "%x28", - "%fp", /* frame pointer */ - "%lr", /* link register */ - "%sp", /* stack pointer */ + "%x24", "%x25", "%x26", "%x27", "%x28", "%fp", "%x30", "%sp", }; #endif /* NDEBUG */ @@ -41,16 +38,17 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_X24, TCG_REG_X25, TCG_REG_X26, TCG_REG_X27, TCG_REG_X28, /* we will reserve this for GUEST_BASE if configured */ - TCG_REG_X9, TCG_REG_X10, TCG_REG_X11, TCG_REG_X12, - TCG_REG_X13, TCG_REG_X14, TCG_REG_X15, + TCG_REG_X8, TCG_REG_X9, TCG_REG_X10, TCG_REG_X11, + TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, TCG_REG_X15, TCG_REG_X16, TCG_REG_X17, - TCG_REG_X18, TCG_REG_X19, /* will not use these, see tcg_target_init */ - TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, TCG_REG_X4, TCG_REG_X5, TCG_REG_X6, TCG_REG_X7, - TCG_REG_X8, /* will not use, see tcg_target_init */ + /* X18 reserved by system */ + /* X19 reserved for AREG0 */ + /* X29 reserved as fp */ + /* X30 reserved as temporary */ }; static const int tcg_target_call_iarg_regs[8] = { @@ -61,13 +59,13 @@ static const int tcg_target_call_oarg_regs[1] = { TCG_REG_X0 }; -#define TCG_REG_TMP TCG_REG_X8 +#define TCG_REG_TMP TCG_REG_X30 #ifndef CONFIG_SOFTMMU -# if defined(CONFIG_USE_GUEST_BASE) -# define TCG_REG_GUEST_BASE TCG_REG_X28 +# ifdef CONFIG_USE_GUEST_BASE +# define TCG_REG_GUEST_BASE TCG_REG_X28 # else -# define TCG_REG_GUEST_BASE TCG_REG_XZR +# define TCG_REG_GUEST_BASE TCG_REG_XZR # endif #endif @@ -1871,7 +1869,7 @@ static void tcg_target_init(TCGContext *s) (1 << TCG_REG_X12) | (1 << TCG_REG_X13) | (1 << TCG_REG_X14) | (1 << TCG_REG_X15) | (1 << TCG_REG_X16) | (1 << TCG_REG_X17) | - (1 << TCG_REG_X18)); + (1 << TCG_REG_X18) | (1 << TCG_REG_X30)); tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP); @@ -1902,13 +1900,13 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_push_pair(s, TCG_REG_SP, TCG_REG_FP, TCG_REG_LR, frame_size_callee_saved); - /* FP -> callee_saved */ + /* Set up frame pointer for canonical unwinding. */ tcg_out_movr_sp(s, TCG_TYPE_I64, TCG_REG_FP, TCG_REG_SP); - /* store callee-preserved regs x19..x28 using FP -> callee_saved */ + /* Store callee-preserved regs x19..x28. */ for (r = TCG_REG_X19; r <= TCG_REG_X27; r += 2) { int idx = (r - TCG_REG_X19) / 2 + 1; - tcg_out_store_pair(s, TCG_REG_FP, r, r + 1, idx); + tcg_out_store_pair(s, TCG_REG_SP, r, r + 1, idx); } /* Make stack space for TCG locals. */ @@ -1939,7 +1937,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) FP must be preserved, so it still points to callee_saved area */ for (r = TCG_REG_X19; r <= TCG_REG_X27; r += 2) { int idx = (r - TCG_REG_X19) / 2 + 1; - tcg_out_load_pair(s, TCG_REG_FP, r, r + 1, idx); + tcg_out_load_pair(s, TCG_REG_SP, r, r + 1, idx); } /* pop (FP, LR), restore SP to previous frame, return */ diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 988983e..faccc36 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -17,17 +17,23 @@ #undef TCG_TARGET_STACK_GROWSUP typedef enum { - TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, TCG_REG_X4, - TCG_REG_X5, TCG_REG_X6, TCG_REG_X7, TCG_REG_X8, TCG_REG_X9, - TCG_REG_X10, TCG_REG_X11, TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, - TCG_REG_X15, TCG_REG_X16, TCG_REG_X17, TCG_REG_X18, TCG_REG_X19, - TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23, TCG_REG_X24, - TCG_REG_X25, TCG_REG_X26, TCG_REG_X27, TCG_REG_X28, - TCG_REG_FP, /* frame pointer */ - TCG_REG_LR, /* link register */ - TCG_REG_SP, /* stack pointer or zero register */ - TCG_REG_XZR = TCG_REG_SP /* same register number */ - /* program counter is not directly accessible! */ + TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, + TCG_REG_X4, TCG_REG_X5, TCG_REG_X6, TCG_REG_X7, + TCG_REG_X8, TCG_REG_X9, TCG_REG_X10, TCG_REG_X11, + TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, TCG_REG_X15, + TCG_REG_X16, TCG_REG_X17, TCG_REG_X18, TCG_REG_X19, + TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23, + TCG_REG_X24, TCG_REG_X25, TCG_REG_X26, TCG_REG_X27, + TCG_REG_X28, TCG_REG_X29, TCG_REG_X30, + + /* X31 is either the stack pointer or zero, depending on context. */ + TCG_REG_SP = 31, + TCG_REG_XZR = 31, + + /* Aliases. */ + TCG_REG_FP = TCG_REG_X29, + TCG_REG_LR = TCG_REG_X30, + TCG_AREG0 = TCG_REG_X19, } TCGReg; #define TCG_TARGET_NB_REGS 32 @@ -92,10 +98,6 @@ typedef enum { #define TCG_TARGET_HAS_muluh_i64 1 #define TCG_TARGET_HAS_mulsh_i64 1 -enum { - TCG_AREG0 = TCG_REG_X19, -}; - #define TCG_TARGET_HAS_new_ldst 0 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) -- 1.9.0