From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46219) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYdaK-0003Ep-HW for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WYdaF-0004IZ-Kp for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:44 -0400 Received: from mail-qg0-x235.google.com ([2607:f8b0:400d:c04::235]:51464) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYdaF-0004IR-HI for qemu-devel@nongnu.org; Fri, 11 Apr 2014 11:41:39 -0400 Received: by mail-qg0-f53.google.com with SMTP id f51so4773208qge.40 for ; Fri, 11 Apr 2014 08:41:39 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Fri, 11 Apr 2014 08:40:26 -0700 Message-Id: <1397230827-24222-25-git-send-email-rth@twiddle.net> In-Reply-To: <1397230827-24222-1-git-send-email-rth@twiddle.net> References: <1397230827-24222-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 24/25] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: claudio.fontana@huawei.com The assembler seems to prefer them, perhaps we should too. Reviewed-by: Claudio Fontana Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 3235824..7ff4be7 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -669,11 +669,6 @@ static void tcg_out_ldst(TCGContext *s, AArch64Insn insn, { TCGMemOp size = (uint32_t)insn >> 30; - if (offset >= -256 && offset < 256) { - tcg_out_insn_3312(s, insn, rd, rn, offset); - return; - } - /* If the offset is naturally aligned and in range, then we can use the scaled uimm12 encoding */ if (offset >= 0 && !(offset & ((1 << size) - 1))) { @@ -684,6 +679,12 @@ static void tcg_out_ldst(TCGContext *s, AArch64Insn insn, } } + /* Small signed offsets can use the unscaled encoding. */ + if (offset >= -256 && offset < 256) { + tcg_out_insn_3312(s, insn, rd, rn, offset); + return; + } + /* Worst-case scenario, move offset to temp register, use reg offset. */ tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, offset); tcg_out_ldst_r(s, insn, rd, rn, TCG_REG_TMP); -- 1.9.0