From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: [PATCH v2 00/25] vlv: add support for RPM Date: Mon, 14 Apr 2014 20:24:21 +0300 Message-ID: <1397496286-29649-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 9AA636E0B3 for ; Mon, 14 Apr 2014 10:24:48 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org For a description of this patchset see the previous cover letter [1]. Tested on HSW (non-ULT), VLV with igt/kms_flip and pm_pc8. v2: - addressed comments about getting the proper runtime PM references in debugfs (Daniel, Paulo, Ville) - disable RPM if RC6 is disabled for all platforms, not just VLV (Daniel) - refactored the runtime PM callbacks pulling platform independent teardown/re-init code to the generic runtime suspend/resume callbacks (Daniel) - fixed a couple of issues I bumped into while checking the RC6/RPS and the GPU reset error capturing path [1] http://lists.freedesktop.org/archives/intel-gfx/2014-April/043208.html Imre Deak (25): drm/i915: vlv: clean up GTLC wake control/status register macros drm/i915: vlv: clear master interrupt flag when disabling interrupts drm/i915: vlv: add RC6 residency counters drm/i915: fix the RC6 status debug print drm/i915: remove the i915_dpio debugfs entry drm/i915: get a runtime PM ref for debugfs entries where needed drm/i915: move getting struct_mutex lower in the callstack during GPU reset drm/i915: get a runtime PM ref for the deferred GT powersave enabling drm/i915: get a runtime PM ref for the deferred GPU reset work drm/i915: gen2: move error capture of IER to its correct place drm/i915: add missing error capturing of the PIPESTAT reg drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on drm/i915: fix unbalanced GT powersave enable / disable calls drm/i915: sanitize enable_rc6 option drm/i915: disable runtime PM if RC6 is disabled drm/i915: make runtime PM interrupt enable/disable platform independent drm/i915: factor out gen6_update_ring_freq drm/i915: make runtime PM swizzling/ring_freq init platform independent drm/i915: reinit GT power save during resume drm/i915: vlv: setup RPS min/max frequencies once during init time drm/i915: vlv: factor out vlv_force_gfx_clock drm/i915: vlv: increase timeout when forcing on the GFX clock drm/i915: add various missing GTI/Gunit register definitions drm/i915: propagate the error code from runtime PM callbacks drm/i915: vlv: add runtime PM support drivers/gpu/drm/i915/i915_debugfs.c | 63 ++--- drivers/gpu/drm/i915/i915_dma.c | 8 +- drivers/gpu/drm/i915/i915_drv.c | 452 +++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/i915_drv.h | 64 ++++- drivers/gpu/drm/i915/i915_gem.c | 5 +- drivers/gpu/drm/i915/i915_gpu_error.c | 11 +- drivers/gpu/drm/i915/i915_irq.c | 23 +- drivers/gpu/drm/i915/i915_reg.h | 56 ++++- drivers/gpu/drm/i915/i915_sysfs.c | 4 + drivers/gpu/drm/i915/intel_display.c | 9 +- drivers/gpu/drm/i915/intel_dp.c | 6 +- drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_pm.c | 185 ++++++++++---- 13 files changed, 737 insertions(+), 151 deletions(-) -- 1.8.4