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Sat, 4 May 2019 10:46:18 -0400 Received: by mail-pf1-f174.google.com with SMTP id 10so4399733pfo.5 for ; Sat, 04 May 2019 07:46:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:from:to:cc:references:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=KrYVIWeGk7qBqvHA6rNpWrRvfMfUKIOhNsH2mOO6/68=; b=JetIVnWaTXyB//mCEeSIJqg/XiUq5os7ckZOxNTNuhuPCnmqn7i85NV+L/w2vJbGHZ FKbVB3Psw3OS3ZbsvvlYcfUIvqzr5FlNs7vAY9mW8JdJ6AzA/zIrti5jbymXgfD7hl6K 3ukTb6WR7/Yhm2qOg3jEq4pwh5wVfFuvAHcqoOIoq5+V2qXaIiuX4j7CCfMAwVCeTaVs AgZDMlXoL/jVkfSYIaOdGdzbEXv8Klo+TQYNLsqhUhwGfiNpVBFQ5imjDlBc2l7O5+ab epL2mOK8EfRiHT4z3KZgQJuMZkepdQjEgojI/lKNcCDDXCTyrI9DSzmerKg3axOU7Ucp 4uiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=KrYVIWeGk7qBqvHA6rNpWrRvfMfUKIOhNsH2mOO6/68=; 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Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/4/19 11:38 PM, Minwoo Im wrote: > On 5/4/19 11:26 PM, Akinobu Mita wrote: >> 2019年5月4日(土) 19:04 Minwoo Im : >>>> +     { NVME_REG_INTMS,       "intms",        32 }, >>>> +     { NVME_REG_INTMC,       "intmc",        32 }, >>>> +     { NVME_REG_CC,          "cc",           32 }, >>>> +     { NVME_REG_CSTS,        "csts",         32 }, >>>> +     { NVME_REG_NSSR,        "nssr",         32 }, >>>> +     { NVME_REG_AQA,         "aqa",          32 }, >>>> +     { NVME_REG_ASQ,         "asq",          64 }, >>>> +     { NVME_REG_ACQ,         "acq",          64 }, >>>> +     { NVME_REG_CMBLOC,      "cmbloc",       32 }, >>>> +     { NVME_REG_CMBSZ,       "cmbsz",        32 }, >>> >>> If it's going to support optional registers also, then we can have >>> BP-related things (BPINFO, BPRSEL, BPMBL) here also. >> >> I'm going to change the register dump in binary format just like >> 'nvme show-regs -o binary' does.  So we'll have registers from 00h to >> 4Fh. >> > > Got it. > > And now I can see those two commands `nvme show-regs` and > `nvme show-regs -o binary` have different results for the register > range.  The binary output covers just 0x50 size, but it shows all the > registers including BP-related things in normal && json format. > > Anyway, I'll prepare a patch for nvme-cli to support binary output > format to cover BP things also. > > Thanks, for your reply. My bad, I misunderstood what you have said above. Please ignore what I mentioned. BP things are located from 40h. to 4Fh. Sorry for making noises here. ;) From mboxrd@z Thu Jan 1 00:00:00 1970 From: minwoo.im.dev@gmail.com (Minwoo Im) Date: Sat, 4 May 2019 23:46:12 +0900 Subject: [PATCH 3/4] nvme-pci: add device coredump support In-Reply-To: References: <1556787561-5113-1-git-send-email-akinobu.mita@gmail.com> <1556787561-5113-4-git-send-email-akinobu.mita@gmail.com> <66a5d068-47b1-341f-988f-c890d7f01720@gmail.com> Message-ID: <13a4ec6d-e586-3879-d883-33bdbf90f294@gmail.com> On 5/4/19 11:38 PM, Minwoo Im wrote: > On 5/4/19 11:26 PM, Akinobu Mita wrote: >> 2019?5?4?(?) 19:04 Minwoo Im : >>>> +???? { NVME_REG_INTMS,?????? "intms",??????? 32 }, >>>> +???? { NVME_REG_INTMC,?????? "intmc",??????? 32 }, >>>> +???? { NVME_REG_CC,????????? "cc",?????????? 32 }, >>>> +???? { NVME_REG_CSTS,??????? "csts",???????? 32 }, >>>> +???? { NVME_REG_NSSR,??????? "nssr",???????? 32 }, >>>> +???? { NVME_REG_AQA,???????? "aqa",????????? 32 }, >>>> +???? { NVME_REG_ASQ,???????? "asq",????????? 64 }, >>>> +???? { NVME_REG_ACQ,???????? "acq",????????? 64 }, >>>> +???? { NVME_REG_CMBLOC,????? "cmbloc",?????? 32 }, >>>> +???? { NVME_REG_CMBSZ,?????? "cmbsz",??????? 32 }, >>> >>> If it's going to support optional registers also, then we can have >>> BP-related things (BPINFO, BPRSEL, BPMBL) here also. >> >> I'm going to change the register dump in binary format just like >> 'nvme show-regs -o binary' does.? So we'll have registers from 00h to >> 4Fh. >> > > Got it. > > And now I can see those two commands `nvme show-regs` and > `nvme show-regs -o binary` have different results for the register > range.? The binary output covers just 0x50 size, but it shows all the > registers including BP-related things in normal && json format. > > Anyway, I'll prepare a patch for nvme-cli to support binary output > format to cover BP things also. > > Thanks, for your reply. My bad, I misunderstood what you have said above. Please ignore what I mentioned. BP things are located from 40h. to 4Fh. Sorry for making noises here. ;)