From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752626AbdHUHuX (ORCPT ); Mon, 21 Aug 2017 03:50:23 -0400 Received: from mga14.intel.com ([192.55.52.115]:22819 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752481AbdHUHuV (ORCPT ); Mon, 21 Aug 2017 03:50:21 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,408,1498546800"; d="scan'208";a="302538130" Subject: Re: [PATCH v1 4/4] KVM: MMU: Expose the LA57 feature to VM. To: Paolo Bonzini , kvm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, xiaoguangrong@tencent.com, joro@8bytes.org References: <1502544906-1108-1-git-send-email-yu.c.zhang@linux.intel.com> <1502544906-1108-5-git-send-email-yu.c.zhang@linux.intel.com> <040155e8-510a-3ada-9d83-f4b489d0981f@linux.intel.com> <517efada-20b8-5746-e62c-cca6f2a8a274@redhat.com> <832539da-a1cd-9bf3-0f5b-e46d65e9ff3d@redhat.com> From: Yu Zhang Message-ID: <13ecdbdb-8770-27a7-aea9-f143be91fa78@linux.intel.com> Date: Mon, 21 Aug 2017 15:27:51 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <832539da-a1cd-9bf3-0f5b-e46d65e9ff3d@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/18/2017 8:50 PM, Paolo Bonzini wrote: > On 18/08/2017 10:28, Yu Zhang wrote: >> >> On 8/17/2017 10:29 PM, Paolo Bonzini wrote: >>> On 17/08/2017 13:53, Yu Zhang wrote: >>>> On 8/17/2017 7:57 PM, Paolo Bonzini wrote: >>>>> On 12/08/2017 15:35, Yu Zhang wrote: >>>>>> index a98b88a..50107ae 100644 >>>>>> --- a/arch/x86/kvm/emulate.c >>>>>> +++ b/arch/x86/kvm/emulate.c >>>>>> @@ -694,7 +694,7 @@ static __always_inline int __linearize(struct >>>>>> x86_emulate_ctxt *ctxt, >>>>>> switch (mode) { >>>>>> case X86EMUL_MODE_PROT64: >>>>>> *linear = la; >>>>>> - if (is_noncanonical_address(la)) >>>>>> + if (emul_is_noncanonical_address(la, ctxt)) >>>>>> goto bad; >>>>>> *max_size = min_t(u64, ~0u, (1ull << 48) - la); >>>>> Oops, you missed one here. Probably best to use ctxt_virt_addr_bits >>>>> and >>>>> then "inline" emul_is_noncanonical_address as "get_canonical(la, >>>>> va_bits) != la". >>>> Sorry, I just sent out the v2 patch set without noticing this reply. :-) >>>> >>>> The emul_is_noncanonical() is defined in x86.h so that no >>>> ctxt_virt_addr_bits needed in emulate.c, are you >>>> suggesting to use ctx_virt_addr_bits in this file each time before >>>> emul_is_noncanonical_address() is called? >>> No, only in this instance which uses "48" after the call to >>> emul_is_noncanonical_address. >> Sorry, Paolo. I still do not quite get it. >> Do you mean the >> *max_size = min_t(u64, ~0u, (1ull << 48) - la); >> also need to be changed? >> >> But I do not understand why this statement is used like this. My >> understanding is that >> for 64 bit scenario, the *max_size is calculated to guarantee la + >> *max_size still falls in >> the canonical address space. >> >> And if above understanding is correct, I think it should be something >> like below: >> *max_size = min_t(u64, ~0u - la, (1ull << 48) - la); > The "~0u" part is simply because max_size has 32-bit size (it's an > unsigned int variable), while (1ull << 48) - la has 64-bit size. It > protects from the overflow. Oh, right. "~0u" is only an unsigned int. Thanks for your clarification. :-) But what if value of "la" falls in between 0xFFFFFFFFFFFFFFFF and 0xFFFF000000000000? (1ull << 48) - la may result in something between 0x1000000000001 and 0x2000000000000, and the *max_size would be 4G - 1 in this scenario. For instance, when "la" is 0xFFFFFFFFFFFFFFF0(unlikely in practice though), the *max_size we are expecting should be 15, instead of 4G - 1. If above understanding is correct, maybe we should change this code as below: @@ -690,16 +690,21 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt,         ulong la;         u32 lim;         u16 sel; +       u64 canonical_limit; +       u8 va_bits;         la = seg_base(ctxt, addr.seg) + addr.ea;         *max_size = 0;         switch (mode) {         case X86EMUL_MODE_PROT64:                 *linear = la; -               if (emul_is_noncanonical_address(la, ctxt)) +               va_bits = ctxt_virt_addr_bits(ctxt); +               if (get_canonical(la, va_bits) != la)                         goto bad; -               *max_size = min_t(u64, ~0u, (1ull << 48) - la); +               canonical_limit = (la & (1 << va_bits)) ? +                                 ~0ull : ((1 << va_bits) -1); +               *max_size = min_t(u64, ~0u, canonical_limit - la + 1); Does this sound reasonable? BTW, I did not use min_t(u64, ~0ull - la + 1, (1 << va_bits) - la) here, because I still would like to keep *max_size as an unsigned int, and my previous suggestion may cause the return value of min_t be truncated. Yu >> And with LA57, may better be changed to: >> *max_size = min_t(u64, ~0u - la, (1ull << ctxt_virt_addr_bits(ctxt)) - >> la); >> >> And for the above >> if (emul_is_noncanonical_address(la, ctxt)) >> we may just leave it as it is. > Yes, exactly. But since emul_is_noncanonical_address is already using > ctxt_virt_addr_bits(ctxt), it may make sense to compute > ctxt_virt_addr_bits(ctxt) once and then reuse it twice, once in > get_canonical(la, va_bits) != la and once in (1ull << va_bits) - la. > > Paolo > >> Is this understanding correct? Or did I misunderstand your comments? :-) >> >> Thanks >> Yu >>> Paolo >>> >