From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751320AbaFFMMf (ORCPT ); Fri, 6 Jun 2014 08:12:35 -0400 Received: from mail-pb0-f53.google.com ([209.85.160.53]:57524 "EHLO mail-pb0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750727AbaFFMMd (ORCPT ); Fri, 6 Jun 2014 08:12:33 -0400 From: Vivek Gautam To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org, gregkh@linuxfoundation.org, kishon@ti.com, mathias.nyman@intel.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, jwerner@chromium.org, Vivek Gautam Subject: [PATCH v1 0/4] Fine tune USB 3.0 PHY on exynos5420 Date: Fri, 6 Jun 2014 17:42:11 +0530 Message-Id: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> X-Mailer: git-send-email 1.7.10.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The RFC version of this series was posted long time back, around December last year [1]. This series is based on Heikki's patches for simpliefied phy lookup table: [PATCHv2 0/6] phy: simplified phy lookup [2], applied against 'usb-next' branch of Greg's usb tree. Tested on peach-pit boards with SuperSpeed devices and confirmed that now the devices are detected as SupedSpeed, not as HighSpeed. Explanation for the need of this patch-series: "The DWC3-exynos eXtensible host controller present on Exynos5420 SoC is quirky. The PHY serving this controller operates at High-Speed by default, so it detects even Super-speed devices as high-speed ones. Certain PHY parameters like Tx LOS levels and Boost levels need to be calibrated further post initialization of xHCI controller, to get SuperSpeed operations working." [1] https://lkml.org/lkml/2013/12/10/365 [2] https://lkml.org/lkml/2014/6/5/358 Vivek Gautam (4): phy: Add provision for calibrating phy. usb: host: xhci-plat: Add support to get PHYs usb: host: xhci-plat: Caibrate PHY post host reset phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 drivers/phy/phy-core.c | 36 ++++++++ drivers/phy/phy-exynos5-usbdrd.c | 168 ++++++++++++++++++++++++++++++++++++++ drivers/usb/host/xhci-plat.c | 74 ++++++++++++++++- drivers/usb/host/xhci.h | 3 + include/linux/phy/phy.h | 7 ++ 5 files changed, 286 insertions(+), 2 deletions(-) -- 1.7.10.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vivek Gautam Subject: [PATCH v1 0/4] Fine tune USB 3.0 PHY on exynos5420 Date: Fri, 6 Jun 2014 17:42:11 +0530 Message-ID: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> Return-path: Sender: linux-usb-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, kishon-l0cyMroinI0@public.gmane.org, mathias.nyman-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, Vivek Gautam List-Id: linux-samsung-soc@vger.kernel.org The RFC version of this series was posted long time back, around December last year [1]. This series is based on Heikki's patches for simpliefied phy lookup table: [PATCHv2 0/6] phy: simplified phy lookup [2], applied against 'usb-next' branch of Greg's usb tree. Tested on peach-pit boards with SuperSpeed devices and confirmed that now the devices are detected as SupedSpeed, not as HighSpeed. Explanation for the need of this patch-series: "The DWC3-exynos eXtensible host controller present on Exynos5420 SoC is quirky. The PHY serving this controller operates at High-Speed by default, so it detects even Super-speed devices as high-speed ones. Certain PHY parameters like Tx LOS levels and Boost levels need to be calibrated further post initialization of xHCI controller, to get SuperSpeed operations working." [1] https://lkml.org/lkml/2013/12/10/365 [2] https://lkml.org/lkml/2014/6/5/358 Vivek Gautam (4): phy: Add provision for calibrating phy. usb: host: xhci-plat: Add support to get PHYs usb: host: xhci-plat: Caibrate PHY post host reset phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 drivers/phy/phy-core.c | 36 ++++++++ drivers/phy/phy-exynos5-usbdrd.c | 168 ++++++++++++++++++++++++++++++++++++++ drivers/usb/host/xhci-plat.c | 74 ++++++++++++++++- drivers/usb/host/xhci.h | 3 + include/linux/phy/phy.h | 7 ++ 5 files changed, 286 insertions(+), 2 deletions(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: gautam.vivek@samsung.com (Vivek Gautam) Date: Fri, 6 Jun 2014 17:42:11 +0530 Subject: [PATCH v1 0/4] Fine tune USB 3.0 PHY on exynos5420 Message-ID: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The RFC version of this series was posted long time back, around December last year [1]. This series is based on Heikki's patches for simpliefied phy lookup table: [PATCHv2 0/6] phy: simplified phy lookup [2], applied against 'usb-next' branch of Greg's usb tree. Tested on peach-pit boards with SuperSpeed devices and confirmed that now the devices are detected as SupedSpeed, not as HighSpeed. Explanation for the need of this patch-series: "The DWC3-exynos eXtensible host controller present on Exynos5420 SoC is quirky. The PHY serving this controller operates at High-Speed by default, so it detects even Super-speed devices as high-speed ones. Certain PHY parameters like Tx LOS levels and Boost levels need to be calibrated further post initialization of xHCI controller, to get SuperSpeed operations working." [1] https://lkml.org/lkml/2013/12/10/365 [2] https://lkml.org/lkml/2014/6/5/358 Vivek Gautam (4): phy: Add provision for calibrating phy. usb: host: xhci-plat: Add support to get PHYs usb: host: xhci-plat: Caibrate PHY post host reset phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 drivers/phy/phy-core.c | 36 ++++++++ drivers/phy/phy-exynos5-usbdrd.c | 168 ++++++++++++++++++++++++++++++++++++++ drivers/usb/host/xhci-plat.c | 74 ++++++++++++++++- drivers/usb/host/xhci.h | 3 + include/linux/phy/phy.h | 7 ++ 5 files changed, 286 insertions(+), 2 deletions(-) -- 1.7.10.4