From mboxrd@z Thu Jan 1 00:00:00 1970 From: John.C.Harrison@Intel.com Subject: [RFC 24/44] drm/i915: Added scheduler interrupt handler hook Date: Thu, 26 Jun 2014 18:24:15 +0100 Message-ID: <1403803475-16337-25-git-send-email-John.C.Harrison@Intel.com> References: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id A71C96E1F9 for ; Thu, 26 Jun 2014 10:25:36 -0700 (PDT) In-Reply-To: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Intel-GFX@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: John Harrison The scheduler needs to be informed of each batch buffer completion. This is done via the user interrupt mechanism. The epilogue of each batch buffer submission updates a sequence number value (seqno) and triggers a user interrupt. This change hooks the scheduler in to the processing of that interrupt via the notify_ring() function. The scheduler also has clean up code that needs to be done outside of the interrupt context, thus notify_ring() now also pokes the scheduler's work queue. --- drivers/gpu/drm/i915/i915_irq.c | 3 +++ drivers/gpu/drm/i915/i915_scheduler.c | 16 ++++++++++++++++ drivers/gpu/drm/i915/i915_scheduler.h | 1 + 3 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index eff08a3e..7089242 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -36,6 +36,7 @@ #include "i915_drv.h" #include "i915_trace.h" #include "intel_drv.h" +#include "i915_scheduler.h" static const u32 hpd_ibx[] = { [HPD_CRT] = SDE_CRT_HOTPLUG, @@ -1218,6 +1219,8 @@ static void notify_ring(struct drm_device *dev, trace_i915_gem_request_complete(ring); + i915_scheduler_handle_IRQ(ring); + wake_up_all(&ring->irq_queue); i915_queue_hangcheck(dev); } diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c index fc165c2..1e4d7c313 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.c +++ b/drivers/gpu/drm/i915/i915_scheduler.c @@ -92,6 +92,17 @@ int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe) return ret; } +int i915_scheduler_handle_IRQ(struct intel_engine_cs *ring) +{ + struct drm_i915_private *dev_priv = ring->dev->dev_private; + + /* Do stuff... */ + + queue_work(dev_priv->wq, &dev_priv->mm.scheduler_work); + + return 0; +} + int i915_scheduler_remove(struct intel_engine_cs *ring) { /* Do stuff... */ @@ -149,4 +160,9 @@ int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe) return i915_gem_do_execbuffer_final(&qe->params); } +int i915_scheduler_handle_IRQ(struct intel_engine_cs *ring) +{ + return 0; +} + #endif /* CONFIG_DRM_I915_SCHEDULER */ diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h index e62254a..dd7d699 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.h +++ b/drivers/gpu/drm/i915/i915_scheduler.h @@ -62,6 +62,7 @@ int i915_scheduler_init(struct drm_device *dev); int i915_scheduler_closefile(struct drm_device *dev, struct drm_file *file); int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe); +int i915_scheduler_handle_IRQ(struct intel_engine_cs *ring); #ifdef CONFIG_DRM_I915_SCHEDULER -- 1.7.9.5