From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44375) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Xzt-0000Hi-CE for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0Xzo-0005TK-47 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:29 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:59047) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Xzn-0005TB-VD for qemu-devel@nongnu.org; Fri, 27 Jun 2014 11:23:24 -0400 From: Leon Alrae Date: Fri, 27 Jun 2014 16:22:08 +0100 Message-ID: <1403882530-47821-20-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1403882530-47821-1-git-send-email-leon.alrae@imgtec.com> References: <1403882530-47821-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v3 19/21] target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net From: Yongbok Kim Signed-off-by: Yongbok Kim Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- disas/mips.c | 2 ++ target-mips/translate.c | 18 ++++++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index dd2473e..e3e253f 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -1313,6 +1313,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"bgtzalc", "s,t,p", 0x1c000000, 0xffe00000, CBD|RD_s|RD_t, 0, I32R6}, {"bltzalc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, {"bltuc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, +{"nal", "p", 0x04100000, 0xffff0000, WR_31, 0, I32R6}, +{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, 0, I32R6}, {"bc1eqz", "T,p", 0x45200000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, {"bc1nez", "T,p", 0x45a00000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, {"bc2eqz", "E,p", 0x49200000, 0xffe00000, CBD|RD_C2, 0, I32R6}, diff --git a/target-mips/translate.c b/target-mips/translate.c index 7cfda3d..6956fdd 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15850,6 +15850,9 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) gen_muldiv(ctx, op1, 0, rs, rt); break; #endif + case OPC_JR: + gen_compute_branch(ctx, op1, 4, rs, rd, sa); + break; case OPC_SPIM: #ifdef MIPS_STRICT_STANDARD MIPS_INVAL("SPIM"); @@ -15932,7 +15935,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) case OPC_XOR: gen_logic(ctx, op1, rd, rs, rt); break; - case OPC_JR ... OPC_JALR: + case OPC_JALR: gen_compute_branch(ctx, op1, 4, rs, rd, sa); break; case OPC_TGE ... OPC_TEQ: /* Traps */ @@ -16899,9 +16902,20 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx) check_insn_opc_removed(ctx, ISA_MIPS32R6); case OPC_BLTZ: case OPC_BGEZ: + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + break; case OPC_BLTZAL: case OPC_BGEZAL: - gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + if (ctx->insn_flags & ISA_MIPS32R6) { + if (rs == 0) { + /* OPC_NAL, OPC_BAL */ + gen_compute_branch(ctx, op1, 4, 0, -1, imm << 2); + } else { + generate_exception(ctx, EXCP_RI); + } + } else { + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + } break; case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */ case OPC_TNEI: -- 1.7.5.4