diff for duplicates of <1407145148-29217-2-git-send-email-jingchang.lu@freescale.com>
diff --git a/a/1.txt b/N1/1.txt
index 72cfa98..4f73179 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,17 +1,17 @@
-From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+From: Jingchang Lu <b35083@freescale.com>
Add Freescale LS1021A SoC device tree support
-Signed-off-by: Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
-Signed-off-by: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
+Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
+Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
+Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
+Signed-off-by: Adrian Sendroiu <adrian.sendroiu@freescale.com>
+Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
+Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
+Signed-off-by: Chao Fu <b44548@freescale.com>
+Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
+Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 678 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 678 insertions(+)
@@ -53,7 +53,7 @@ index 0000000..948b9fb
+ ethernet2 = &enet2;
+ };
+
-+ memory@80000000 {
++ memory at 80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x20000000>;
+ };
@@ -62,13 +62,13 @@ index 0000000..948b9fb
+ #address-cells = <1>;
+ #size-cells = <0>;
+
-+ cpu@f00 {
++ cpu at f00 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0xf00>;
+ };
+
-+ cpu@f01 {
++ cpu at f01 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0xf01>;
@@ -96,7 +96,7 @@ index 0000000..948b9fb
+ interrupt-parent = <&gic>;
+ ranges;
+
-+ gic: interrupt-controller@1400000 {
++ gic: interrupt-controller at 1400000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
@@ -108,18 +108,18 @@ index 0000000..948b9fb
+
+ };
+
-+ ifc: ifc@1530000 {
++ ifc: ifc at 1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x1530000 0x0 0x10000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
-+ dcfg: dcfg@1ee0000 {
++ dcfg: dcfg at 1ee0000 {
+ compatible = "fsl,ls1021a-dcfg";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
+
-+ esdhc: esdhc@1560000 {
++ esdhc: esdhc at 1560000 {
+ compatible = "fsl,esdhc";
+ reg = <0x0 0x1560000 0x0 0x10000>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
@@ -131,12 +131,12 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ scfg: scfg@1570000 {
++ scfg: scfg at 1570000 {
+ compatible = "fsl,ls1021a-scfg";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ };
+
-+ crypto: crypto@1700000 {
++ crypto: crypto at 1700000 {
+ compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
+ fsl,sec-era = <4>;
+ #address-cells = <1>;
@@ -145,7 +145,7 @@ index 0000000..948b9fb
+ ranges = <0x0 0x0 0x1700000 0x100000>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+
-+ sec_jr0: jr@10000 {
++ sec_jr0: jr at 10000 {
+ compatible = "fsl,sec-v5.3-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
@@ -153,7 +153,7 @@ index 0000000..948b9fb
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
-+ sec_jr1: jr@20000 {
++ sec_jr1: jr at 20000 {
+ compatible = "fsl,sec-v5.3-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
@@ -161,7 +161,7 @@ index 0000000..948b9fb
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
-+ sec_jr2: jr@30000 {
++ sec_jr2: jr at 30000 {
+ compatible = "fsl,sec-v5.3-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
@@ -169,7 +169,7 @@ index 0000000..948b9fb
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
-+ sec_jr3: jr@40000 {
++ sec_jr3: jr at 40000 {
+ compatible = "fsl,sec-v5.3-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
@@ -179,7 +179,7 @@ index 0000000..948b9fb
+
+ };
+
-+ clockgen: clocking@1ee1000 {
++ clockgen: clocking at 1ee1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1ee1000 0x10000>;
@@ -191,7 +191,7 @@ index 0000000..948b9fb
+ clock-output-names = "sysclk";
+ };
+
-+ cga_pll1: pll1@800 {
++ cga_pll1: pll1 at 800 {
+ compatible = "fsl,qoriq-core-pll-2.0";
+ #clock-cells = <1>;
+ reg = <0x800 0x10>;
@@ -200,7 +200,7 @@ index 0000000..948b9fb
+ "cga-pll1-div3", "cga-pll1-div4";
+ };
+
-+ cga_pll2: pll2@820 {
++ cga_pll2: pll2 at 820 {
+ compatible = "fsl,qoriq-core-pll-2.0";
+ #clock-cells = <1>;
+ reg = <0x820 0x10>;
@@ -209,7 +209,7 @@ index 0000000..948b9fb
+ "cga-pll2-div3", "cga-pll2-div4";
+ };
+
-+ platform_clk: pll@c00 {
++ platform_clk: pll at c00 {
+ compatible = "fsl,qoriq-core-pll-2.0";
+ #clock-cells = <1>;
+ reg = <0xc00 0x10>;
@@ -217,7 +217,7 @@ index 0000000..948b9fb
+ clock-output-names = "platform-clk", "platform-clk-div2";
+ };
+
-+ cluster1_clk: clk0c0@0 {
++ cluster1_clk: clk0c0 at 0 {
+ compatible = "fsl,qoriq-core-mux-2.0";
+ #clock-cells = <1>;
+ reg = <0x0 0x10>;
@@ -228,7 +228,7 @@ index 0000000..948b9fb
+ };
+ };
+
-+ dspi0: dspi@2100000 {
++ dspi0: dspi at 2100000 {
+ compatible = "fsl,vf610-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -241,7 +241,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ dspi1: dspi@2110000 {
++ dspi1: dspi at 2110000 {
+ compatible = "fsl,vf610-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -254,7 +254,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ i2c0: i2c@2180000 {
++ i2c0: i2c at 2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -265,7 +265,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ i2c1: i2c@2190000 {
++ i2c1: i2c at 2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -276,7 +276,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ i2c2: i2c@21a0000 {
++ i2c2: i2c at 21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -287,7 +287,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ uart0: serial@21c0500 {
++ uart0: serial at 21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0500 0x0 0x100>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -296,7 +296,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ uart1: serial@21c0600 {
++ uart1: serial at 21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0600 0x0 0x100>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -305,7 +305,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ uart2: serial@21d0500 {
++ uart2: serial at 21d0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0500 0x0 0x100>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -314,7 +314,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ uart3: serial@21d0600 {
++ uart3: serial at 21d0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0600 0x0 0x100>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -323,7 +323,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart0: serial@2950000 {
++ lpuart0: serial at 2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
@@ -332,7 +332,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart1: serial@2960000 {
++ lpuart1: serial at 2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@@ -341,7 +341,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart2: serial@2970000 {
++ lpuart2: serial at 2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
@@ -350,7 +350,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart3: serial@2980000 {
++ lpuart3: serial at 2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -359,7 +359,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart4: serial@2990000 {
++ lpuart4: serial at 2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -368,7 +368,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ lpuart5: serial@29a0000 {
++ lpuart5: serial at 29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -377,7 +377,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ ftm0_1: ftm0_1@29d0000 {
++ ftm0_1: ftm0_1 at 29d0000 {
+ compatible = "fsl,ftm-timer";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x29e0000 0x0 0x10000>;
@@ -390,7 +390,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ pwm3: ftm@2a00000 {
++ pwm3: ftm at 2a00000 {
+ compatible = "fsl,vf610-ftm-pwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x2a00000 0x0 0x10000>;
@@ -403,7 +403,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ pwm6: ftm@2a30000 {
++ pwm6: ftm at 2a30000 {
+ compatible = "fsl,vf610-ftm-pwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x2a30000 0x0 0x10000>;
@@ -416,7 +416,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ pwm7: ftm@2a40000 {
++ pwm7: ftm at 2a40000 {
+ compatible = "fsl,vf610-ftm-pwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x2a40000 0x0 0x10000>;
@@ -429,7 +429,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ wdog0: wdog@2ad0000 {
++ wdog0: wdog at 2ad0000 {
+ compatible = "fsl,imx21-wdt";
+ reg = <0x0 0x2ad0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
@@ -438,7 +438,7 @@ index 0000000..948b9fb
+ big-endian;
+ };
+
-+ sai1: sai@2b50000 {
++ sai1: sai at 2b50000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0x2b50000 0x0 0x10000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
@@ -451,7 +451,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ sai2: sai@2b60000 {
++ sai2: sai at 2b60000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0x2b60000 0x0 0x10000>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
@@ -464,7 +464,7 @@ index 0000000..948b9fb
+ status = "disabled";
+ };
+
-+ edma0: edma@2c00000 {
++ edma0: edma at 2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x0 0x2c00000 0x0 0x10000>,
@@ -480,7 +480,7 @@ index 0000000..948b9fb
+ <&platform_clk 1>;
+ };
+
-+ mdio0: mdio@2d24000 {
++ mdio0: mdio at 2d24000 {
+ compatible = "gianfar";
+ device_type = "mdio";
+ #address-cells = <1>;
@@ -488,7 +488,7 @@ index 0000000..948b9fb
+ reg = <0x0 0x2d24000 0x0 0x4000>;
+ };
+
-+ enet0: ethernet@2d10000 {
++ enet0: ethernet at 2d10000 {
+ compatible = "fsl,etsec2";
+ device_type = "network";
+ #address-cells = <2>;
@@ -500,7 +500,7 @@ index 0000000..948b9fb
+ fsl,num_tx_queues = <0x1>;
+ ranges;
+
-+ queue-group@0 {
++ queue-group at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x2d10000 0x0 0x8000>;
@@ -513,7 +513,7 @@ index 0000000..948b9fb
+
+ };
+
-+ enet1: ethernet@2d50000 {
++ enet1: ethernet at 2d50000 {
+ compatible = "fsl,etsec2";
+ device_type = "network";
+ #address-cells = <2>;
@@ -525,7 +525,7 @@ index 0000000..948b9fb
+ fsl,num_tx_queues = <0x1>;
+ ranges;
+
-+ queue-group@0 {
++ queue-group at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x2d50000 0x0 0x8000>;
@@ -538,7 +538,7 @@ index 0000000..948b9fb
+
+ };
+
-+ enet2: ethernet@2d90000 {
++ enet2: ethernet at 2d90000 {
+ compatible = "fsl,etsec2";
+ device_type = "network";
+ #address-cells = <2>;
@@ -550,7 +550,7 @@ index 0000000..948b9fb
+ fsl,num_tx_queues = <0x1>;
+ ranges;
+
-+ queue-group@0 {
++ queue-group at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x2d90000 0x0 0x8000>;
@@ -562,7 +562,7 @@ index 0000000..948b9fb
+ };
+ };
+
-+ usb@8600000 {
++ usb at 8600000 {
+ compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
+ reg = <0x0 0x8600000 0x0 0x1000>;
+ #address-cells = <1>;
@@ -572,7 +572,7 @@ index 0000000..948b9fb
+ phy_type = "ulpi";
+ };
+
-+ usb@3100000 {
++ usb at 3100000 {
+ compatible = "fsl,fsl-dwc3";
+ #address-cells = <2>;
+ #size-cells = <2>;
@@ -595,116 +595,111 @@ index 0000000..948b9fb
+
+ ranges = <0x0 0x0 0x20000000 0x1000000>;
+
-+ dcsr-epu@0 {
++ dcsr-epu at 0 {
+ compatible = "fsl,ls1021a-dcsr-epu";
+ reg = <0x0 0x10000>;
+ };
+
-+ dcsr-gdi@100000 {
++ dcsr-gdi at 100000 {
+ compatible = "fsl,ls1021a-dcsr-gdi";
+ reg = <0x100000 0x10000>;
+ };
+
-+ dcsr-dddi@120000 {
++ dcsr-dddi at 120000 {
+ compatible = "fsl,ls1021a-dcsr-dddi";
+ reg = <0x120000 0x10000>;
+ };
+
-+ dcsr-dcfg@220000 {
++ dcsr-dcfg at 220000 {
+ compatible = "fsl,ls1021a-dcsr-dcfg";
+ reg = <0x220000 0x1000>;
+ };
+
-+ dcsr-clock@221000 {
++ dcsr-clock at 221000 {
+ compatible = "fsl,ls1021a-dcsr-clock";
+ reg = <0x221000 0x1000>;
+ };
+
-+ dcsr-rcpm@222000 {
++ dcsr-rcpm at 222000 {
+ compatible = "fsl,ls1021a-dcsr-rcpm";
+ reg = <0x222000 0x1000 0x223000 0x1000>;
+ };
+
-+ dcsr-ccp@225000 {
++ dcsr-ccp at 225000 {
+ compatible = "fsl,ls1021a-dcsr-ccp";
+ reg = <0x225000 0x1000>;
+ };
+
-+ dcsr-fusectrl@226000 {
++ dcsr-fusectrl at 226000 {
+ compatible = "fsl,ls1021a-dcsr-fusectrl";
+ reg = <0x226000 0x1000>;
+ };
+
-+ dcsr-dap@300000 {
++ dcsr-dap at 300000 {
+ compatible = "fsl,ls1021a-dcsr-dap";
+ reg = <0x300000 0x10000>;
+ };
+
-+ dcsr-cstf@350000 {
++ dcsr-cstf at 350000 {
+ compatible = "fsl,ls1021a-dcsr-cstf";
+ reg = <0x350000 0x1000 0x3a7000 0x1000>;
+ };
+
-+ dcsr-a7rom@360000 {
++ dcsr-a7rom at 360000 {
+ compatible = "fsl,ls1021a-dcsr-a7rom";
+ reg = <0x360000 0x10000>;
+ };
+
-+ dcsr-a7cpu@370000 {
++ dcsr-a7cpu at 370000 {
+ compatible = "fsl,ls1021a-dcsr-a7cpu";
+ reg = <0x370000 0x8000>;
+ };
+
-+ dcsr-a7cti@378000 {
++ dcsr-a7cti at 378000 {
+ compatible = "fsl,ls1021a-dcsr-a7cti";
+ reg = <0x378000 0x4000>;
+ };
+
-+ dcsr-etm@37c000 {
++ dcsr-etm at 37c000 {
+ compatible = "fsl,ls1021a-dcsr-etm";
+ reg = <0x37c000 0x1000 0x37d000 0x3000>;
+ };
+
-+ dcsr-hugorom@3a0000 {
++ dcsr-hugorom at 3a0000 {
+ compatible = "fsl,ls1021a-dcsr-hugorom";
+ reg = <0x3a0000 0x1000>;
+ };
+
-+ dcsr-etf@3a1000 {
++ dcsr-etf at 3a1000 {
+ compatible = "fsl,ls1021a-dcsr-etf";
+ reg = <0x3a1000 0x1000 0x3a2000 0x1000>;
+ };
+
-+ dcsr-etr@3a3000 {
++ dcsr-etr at 3a3000 {
+ compatible = "fsl,ls1021a-dcsr-etr";
+ reg = <0x3a3000 0x1000>;
+ };
+
-+ dcsr-cti@3a4000 {
++ dcsr-cti at 3a4000 {
+ compatible = "fsl,ls1021a-dcsr-cti";
+ reg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>;
+ };
+
-+ dcsr-atbrepl@3a8000 {
++ dcsr-atbrepl at 3a8000 {
+ compatible = "fsl,ls1021a-dcsr-atbrepl";
+ reg = <0x3a8000 0x1000>;
+ };
+
-+ dcsr-tsgen-ctrl@3a9000 {
++ dcsr-tsgen-ctrl at 3a9000 {
+ compatible = "fsl,ls1021a-dcsr-tsgen-ctrl";
+ reg = <0x3a9000 0x1000>;
+ };
+
-+ dcsr-tsgen-read@3aa000 {
++ dcsr-tsgen-read at 3aa000 {
+ compatible = "fsl,ls1021a-dcsr-tsgen-read";
+ reg = <0x3aa000 0x1000>;
+ };
+ };
+};
--
-1.8.0
-
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
\ No newline at end of file
+1.8.0
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index f87d51a..c134736 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,7 @@
"ref\0001407145148-29217-1-git-send-email-jingchang.lu\@freescale.com\0"
]
[
- "ref\0001407145148-29217-1-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org\0"
-]
-[
- "From\0Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\0"
+ "From\0jingchang.lu\@freescale.com (Jingchang Lu)\0"
]
[
"Subject\0[PATCHv2 1/6] ARM: dts: Add SoC level device tree support for LS1021A\0"
@@ -14,23 +11,7 @@
"Date\0Mon, 4 Aug 2014 17:39:03 +0800\0"
]
[
- "To\0shawn.guo-KZfg59tc24xl57MIdRCFDg\@public.gmane.org\0"
-]
-[
- "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org",
- " devicetree-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org",
- " mark.rutland-5wv7dgnIgG8\@public.gmane.org",
- " Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>",
- " Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -39,20 +20,20 @@
"b\0"
]
[
- "From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
+ "From: Jingchang Lu <b35083\@freescale.com>\n",
"\n",
"Add Freescale LS1021A SoC device tree support\n",
"\n",
- "Signed-off-by: Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
- "Signed-off-by: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg\@public.gmane.org>\n",
+ "Signed-off-by: Nikhil Badola <nikhil.badola\@freescale.com>\n",
+ "Signed-off-by: Chenhui Zhao <chenhui.zhao\@freescale.com>\n",
+ "Signed-off-by: Suresh Gupta <suresh.gupta\@freescale.com>\n",
+ "Signed-off-by: Shaveta Leekha <shaveta\@freescale.com>\n",
+ "Signed-off-by: Adrian Sendroiu <adrian.sendroiu\@freescale.com>\n",
+ "Signed-off-by: Ruchika Gupta <ruchika.gupta\@freescale.com>\n",
+ "Signed-off-by: Bhupesh Sharma <bhupesh.sharma\@freescale.com>\n",
+ "Signed-off-by: Chao Fu <b44548\@freescale.com>\n",
+ "Signed-off-by: Xiubo Li <Li.Xiubo\@freescale.com>\n",
+ "Signed-off-by: Jingchang Lu <jingchang.lu\@freescale.com>\n",
"---\n",
" arch/arm/boot/dts/ls1021a.dtsi | 678 +++++++++++++++++++++++++++++++++++++++++\n",
" 1 file changed, 678 insertions(+)\n",
@@ -94,7 +75,7 @@
"+\t\tethernet2 = &enet2;\n",
"+\t};\n",
"+\n",
- "+\tmemory\@80000000 {\n",
+ "+\tmemory at 80000000 {\n",
"+\t\tdevice_type = \"memory\";\n",
"+\t\treg = <0x0 0x80000000 0x0 0x20000000>;\n",
"+\t};\n",
@@ -103,13 +84,13 @@
"+\t\t#address-cells = <1>;\n",
"+\t\t#size-cells = <0>;\n",
"+\n",
- "+\t\tcpu\@f00 {\n",
+ "+\t\tcpu at f00 {\n",
"+\t\t\tcompatible = \"arm,cortex-a7\";\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\treg = <0xf00>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tcpu\@f01 {\n",
+ "+\t\tcpu at f01 {\n",
"+\t\t\tcompatible = \"arm,cortex-a7\";\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\treg = <0xf01>;\n",
@@ -137,7 +118,7 @@
"+\t\tinterrupt-parent = <&gic>;\n",
"+\t\tranges;\n",
"+\n",
- "+\t\tgic: interrupt-controller\@1400000 {\n",
+ "+\t\tgic: interrupt-controller at 1400000 {\n",
"+\t\t\tcompatible = \"arm,cortex-a7-gic\";\n",
"+\t\t\t#interrupt-cells = <3>;\n",
"+\t\t\tinterrupt-controller;\n",
@@ -149,18 +130,18 @@
"+\n",
"+\t\t};\n",
"+\n",
- "+\t\tifc: ifc\@1530000 {\n",
+ "+\t\tifc: ifc at 1530000 {\n",
"+\t\t\tcompatible = \"fsl,ifc\", \"simple-bus\";\n",
"+\t\t\treg = <0x0 0x1530000 0x0 0x10000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcfg: dcfg\@1ee0000 {\n",
+ "+\t\tdcfg: dcfg at 1ee0000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcfg\";\n",
"+\t\t\treg = <0x0 0x1ee0000 0x0 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tesdhc: esdhc\@1560000 {\n",
+ "+\t\tesdhc: esdhc at 1560000 {\n",
"+\t\t\tcompatible = \"fsl,esdhc\";\n",
"+\t\t\treg = <0x0 0x1560000 0x0 0x10000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -172,12 +153,12 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tscfg: scfg\@1570000 {\n",
+ "+\t\tscfg: scfg at 1570000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-scfg\";\n",
"+\t\t\treg = <0x0 0x1570000 0x0 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tcrypto: crypto\@1700000 {\n",
+ "+\t\tcrypto: crypto at 1700000 {\n",
"+\t\t\tcompatible = \"fsl,sec-v5.3\", \"fsl,sec-v5.0\", \"fsl,sec-v4.0\";\n",
"+\t\t\tfsl,sec-era = <4>;\n",
"+\t\t\t#address-cells = <1>;\n",
@@ -186,7 +167,7 @@
"+\t\t\tranges\t\t = <0x0 0x0 0x1700000 0x100000>;\n",
"+\t\t\tinterrupts\t = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;\n",
"+\n",
- "+\t\t\tsec_jr0: jr\@10000 {\n",
+ "+\t\t\tsec_jr0: jr at 10000 {\n",
"+\t\t\t\tcompatible = \"fsl,sec-v5.3-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v5.0-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v4.0-job-ring\";\n",
@@ -194,7 +175,7 @@
"+\t\t\t\tinterrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tsec_jr1: jr\@20000 {\n",
+ "+\t\t\tsec_jr1: jr at 20000 {\n",
"+\t\t\t\tcompatible = \"fsl,sec-v5.3-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v5.0-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v4.0-job-ring\";\n",
@@ -202,7 +183,7 @@
"+\t\t\t\tinterrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tsec_jr2: jr\@30000 {\n",
+ "+\t\t\tsec_jr2: jr at 30000 {\n",
"+\t\t\t\tcompatible = \"fsl,sec-v5.3-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v5.0-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v4.0-job-ring\";\n",
@@ -210,7 +191,7 @@
"+\t\t\t\tinterrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tsec_jr3: jr\@40000 {\n",
+ "+\t\t\tsec_jr3: jr at 40000 {\n",
"+\t\t\t\tcompatible = \"fsl,sec-v5.3-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v5.0-job-ring\",\n",
"+\t\t\t\t \"fsl,sec-v4.0-job-ring\";\n",
@@ -220,7 +201,7 @@
"+\n",
"+\t\t};\n",
"+\n",
- "+\t\tclockgen: clocking\@1ee1000 {\n",
+ "+\t\tclockgen: clocking at 1ee1000 {\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <1>;\n",
"+\t\t\tranges = <0x0 0x0 0x1ee1000 0x10000>;\n",
@@ -232,7 +213,7 @@
"+\t\t\t\tclock-output-names = \"sysclk\";\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tcga_pll1: pll1\@800 {\n",
+ "+\t\t\tcga_pll1: pll1 at 800 {\n",
"+\t\t\t\tcompatible = \"fsl,qoriq-core-pll-2.0\";\n",
"+\t\t\t\t#clock-cells = <1>;\n",
"+\t\t\t\treg = <0x800 0x10>;\n",
@@ -241,7 +222,7 @@
"+\t\t\t\t\t\t\"cga-pll1-div3\", \"cga-pll1-div4\";\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tcga_pll2: pll2\@820 {\n",
+ "+\t\t\tcga_pll2: pll2 at 820 {\n",
"+\t\t\t\tcompatible = \"fsl,qoriq-core-pll-2.0\";\n",
"+\t\t\t\t#clock-cells = <1>;\n",
"+\t\t\t\treg = <0x820 0x10>;\n",
@@ -250,7 +231,7 @@
"+\t\t\t\t\t\t\"cga-pll2-div3\", \"cga-pll2-div4\";\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tplatform_clk: pll\@c00 {\n",
+ "+\t\t\tplatform_clk: pll at c00 {\n",
"+\t\t\t\tcompatible = \"fsl,qoriq-core-pll-2.0\";\n",
"+\t\t\t\t#clock-cells = <1>;\n",
"+\t\t\t\treg = <0xc00 0x10>;\n",
@@ -258,7 +239,7 @@
"+\t\t\t\tclock-output-names = \"platform-clk\", \"platform-clk-div2\";\n",
"+\t\t\t};\n",
"+\n",
- "+\t\t\tcluster1_clk: clk0c0\@0 {\n",
+ "+\t\t\tcluster1_clk: clk0c0 at 0 {\n",
"+\t\t\t\tcompatible = \"fsl,qoriq-core-mux-2.0\";\n",
"+\t\t\t\t#clock-cells = <1>;\n",
"+\t\t\t\treg = <0x0 0x10>;\n",
@@ -269,7 +250,7 @@
"+\t\t\t};\n",
"+\t\t};\n",
"+\n",
- "+\t\tdspi0: dspi\@2100000 {\n",
+ "+\t\tdspi0: dspi at 2100000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-dspi\";\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <0>;\n",
@@ -282,7 +263,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tdspi1: dspi\@2110000 {\n",
+ "+\t\tdspi1: dspi at 2110000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-dspi\";\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <0>;\n",
@@ -295,7 +276,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\ti2c0: i2c\@2180000 {\n",
+ "+\t\ti2c0: i2c at 2180000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-i2c\";\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <0>;\n",
@@ -306,7 +287,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\ti2c1: i2c\@2190000 {\n",
+ "+\t\ti2c1: i2c at 2190000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-i2c\";\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <0>;\n",
@@ -317,7 +298,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\ti2c2: i2c\@21a0000 {\n",
+ "+\t\ti2c2: i2c at 21a0000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-i2c\";\n",
"+\t\t\t#address-cells = <1>;\n",
"+\t\t\t#size-cells = <0>;\n",
@@ -328,7 +309,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tuart0: serial\@21c0500 {\n",
+ "+\t\tuart0: serial at 21c0500 {\n",
"+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n",
"+\t\t\treg = <0x0 0x21c0500 0x0 0x100>;\n",
"+\t\t\tinterrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -337,7 +318,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tuart1: serial\@21c0600 {\n",
+ "+\t\tuart1: serial at 21c0600 {\n",
"+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n",
"+\t\t\treg = <0x0 0x21c0600 0x0 0x100>;\n",
"+\t\t\tinterrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -346,7 +327,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tuart2: serial\@21d0500 {\n",
+ "+\t\tuart2: serial at 21d0500 {\n",
"+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n",
"+\t\t\treg = <0x0 0x21d0500 0x0 0x100>;\n",
"+\t\t\tinterrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -355,7 +336,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tuart3: serial\@21d0600 {\n",
+ "+\t\tuart3: serial at 21d0600 {\n",
"+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n",
"+\t\t\treg = <0x0 0x21d0600 0x0 0x100>;\n",
"+\t\t\tinterrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -364,7 +345,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart0: serial\@2950000 {\n",
+ "+\t\tlpuart0: serial at 2950000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x2950000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -373,7 +354,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart1: serial\@2960000 {\n",
+ "+\t\tlpuart1: serial at 2960000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x2960000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -382,7 +363,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart2: serial\@2970000 {\n",
+ "+\t\tlpuart2: serial at 2970000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x2970000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -391,7 +372,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart3: serial\@2980000 {\n",
+ "+\t\tlpuart3: serial at 2980000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x2980000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -400,7 +381,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart4: serial\@2990000 {\n",
+ "+\t\tlpuart4: serial at 2990000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x2990000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -409,7 +390,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tlpuart5: serial\@29a0000 {\n",
+ "+\t\tlpuart5: serial at 29a0000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n",
"+\t\t\treg = <0x0 0x29a0000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -418,7 +399,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tftm0_1: ftm0_1\@29d0000 {\n",
+ "+\t\tftm0_1: ftm0_1 at 29d0000 {\n",
"+\t\t\tcompatible = \"fsl,ftm-timer\";\n",
"+\t\t\treg = <0x0 0x29d0000 0x0 0x10000>,\n",
"+\t\t\t\t<0x0 0x29e0000 0x0 0x10000>;\n",
@@ -431,7 +412,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tpwm3: ftm\@2a00000 {\n",
+ "+\t\tpwm3: ftm at 2a00000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-ftm-pwm\";\n",
"+\t\t\t#pwm-cells = <3>;\n",
"+\t\t\treg = <0x0 0x2a00000 0x0 0x10000>;\n",
@@ -444,7 +425,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tpwm6: ftm\@2a30000 {\n",
+ "+\t\tpwm6: ftm at 2a30000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-ftm-pwm\";\n",
"+\t\t\t#pwm-cells = <3>;\n",
"+\t\t\treg = <0x0 0x2a30000 0x0 0x10000>;\n",
@@ -457,7 +438,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tpwm7: ftm\@2a40000 {\n",
+ "+\t\tpwm7: ftm at 2a40000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-ftm-pwm\";\n",
"+\t\t\t#pwm-cells = <3>;\n",
"+\t\t\treg = <0x0 0x2a40000 0x0 0x10000>;\n",
@@ -470,7 +451,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\twdog0: wdog\@2ad0000 {\n",
+ "+\t\twdog0: wdog at 2ad0000 {\n",
"+\t\t\tcompatible = \"fsl,imx21-wdt\";\n",
"+\t\t\treg = <0x0 0x2ad0000 0x0 0x10000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -479,7 +460,7 @@
"+\t\t\tbig-endian;\n",
"+\t\t};\n",
"+\n",
- "+\t\tsai1: sai\@2b50000 {\n",
+ "+\t\tsai1: sai at 2b50000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-sai\";\n",
"+\t\t\treg = <0x0 0x2b50000 0x0 0x10000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -492,7 +473,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tsai2: sai\@2b60000 {\n",
+ "+\t\tsai2: sai at 2b60000 {\n",
"+\t\t\tcompatible = \"fsl,vf610-sai\";\n",
"+\t\t\treg = <0x0 0x2b60000 0x0 0x10000>;\n",
"+\t\t\tinterrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -505,7 +486,7 @@
"+\t\t\tstatus = \"disabled\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tedma0: edma\@2c00000 {\n",
+ "+\t\tedma0: edma at 2c00000 {\n",
"+\t\t\t#dma-cells = <2>;\n",
"+\t\t\tcompatible = \"fsl,vf610-edma\";\n",
"+\t\t\treg = <0x0 0x2c00000 0x0 0x10000>,\n",
@@ -521,7 +502,7 @@
"+\t\t\t\t<&platform_clk 1>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tmdio0: mdio\@2d24000 {\n",
+ "+\t\tmdio0: mdio at 2d24000 {\n",
"+\t\t\tcompatible = \"gianfar\";\n",
"+\t\t\tdevice_type = \"mdio\";\n",
"+\t\t\t#address-cells = <1>;\n",
@@ -529,7 +510,7 @@
"+\t\t\treg = <0x0 0x2d24000 0x0 0x4000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tenet0: ethernet\@2d10000 {\n",
+ "+\t\tenet0: ethernet at 2d10000 {\n",
"+\t\t\tcompatible = \"fsl,etsec2\";\n",
"+\t\t\tdevice_type = \"network\";\n",
"+\t\t\t#address-cells = <2>;\n",
@@ -541,7 +522,7 @@
"+\t\t\tfsl,num_tx_queues = <0x1>;\n",
"+\t\t\tranges;\n",
"+\n",
- "+\t\t\tqueue-group\@0 {\n",
+ "+\t\t\tqueue-group at 0 {\n",
"+\t\t\t\t#address-cells = <1>;\n",
"+\t\t\t\t#size-cells = <1>;\n",
"+\t\t\t\treg = <0x0 0x2d10000 0x0 0x8000>;\n",
@@ -554,7 +535,7 @@
"+\n",
"+\t\t};\n",
"+\n",
- "+\t\tenet1: ethernet\@2d50000 {\n",
+ "+\t\tenet1: ethernet at 2d50000 {\n",
"+\t\t\tcompatible = \"fsl,etsec2\";\n",
"+\t\t\tdevice_type = \"network\";\n",
"+\t\t\t#address-cells = <2>;\n",
@@ -566,7 +547,7 @@
"+\t\t\tfsl,num_tx_queues = <0x1>;\n",
"+\t\t\tranges;\n",
"+\n",
- "+\t\t\tqueue-group\@0 {\n",
+ "+\t\t\tqueue-group at 0 {\n",
"+\t\t\t\t#address-cells = <1>;\n",
"+\t\t\t\t#size-cells = <1>;\n",
"+\t\t\t\treg = <0x0 0x2d50000 0x0 0x8000>;\n",
@@ -579,7 +560,7 @@
"+\n",
"+\t\t};\n",
"+\n",
- "+\t\tenet2: ethernet\@2d90000 {\n",
+ "+\t\tenet2: ethernet at 2d90000 {\n",
"+\t\t\tcompatible = \"fsl,etsec2\";\n",
"+\t\t\tdevice_type = \"network\";\n",
"+\t\t\t#address-cells = <2>;\n",
@@ -591,7 +572,7 @@
"+\t\t\tfsl,num_tx_queues = <0x1>;\n",
"+\t\t\tranges;\n",
"+\n",
- "+\t\t\tqueue-group\@0 {\n",
+ "+\t\t\tqueue-group at 0 {\n",
"+\t\t\t\t#address-cells = <1>;\n",
"+\t\t\t\t#size-cells = <1>;\n",
"+\t\t\t\treg = <0x0 0x2d90000 0x0 0x8000>;\n",
@@ -603,7 +584,7 @@
"+\t\t\t};\n",
"+\t\t};\n",
"+\n",
- "+\t\tusb\@8600000 {\n",
+ "+\t\tusb at 8600000 {\n",
"+\t\t\tcompatible = \"fsl-usb2-dr-v2.5\", \"fsl-usb2-dr\";\n",
"+\t\t\treg = <0x0 0x8600000 0x0 0x1000>;\n",
"+\t\t\t#address-cells = <1>;\n",
@@ -613,7 +594,7 @@
"+\t\t\tphy_type = \"ulpi\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tusb\@3100000 {\n",
+ "+\t\tusb at 3100000 {\n",
"+\t\t\tcompatible = \"fsl,fsl-dwc3\";\n",
"+\t\t\t#address-cells = <2>;\n",
"+\t\t\t#size-cells = <2>;\n",
@@ -636,119 +617,114 @@
"+\n",
"+\t\tranges = <0x0 0x0 0x20000000 0x1000000>;\n",
"+\n",
- "+\t\tdcsr-epu\@0 {\n",
+ "+\t\tdcsr-epu at 0 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-epu\";\n",
"+\t\t\treg = <0x0 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-gdi\@100000 {\n",
+ "+\t\tdcsr-gdi at 100000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-gdi\";\n",
"+\t\t\treg = <0x100000 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-dddi\@120000 {\n",
+ "+\t\tdcsr-dddi at 120000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-dddi\";\n",
"+\t\t\treg = <0x120000 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-dcfg\@220000 {\n",
+ "+\t\tdcsr-dcfg at 220000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-dcfg\";\n",
"+\t\t\treg = <0x220000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-clock\@221000 {\n",
+ "+\t\tdcsr-clock at 221000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-clock\";\n",
"+\t\t\treg = <0x221000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-rcpm\@222000 {\n",
+ "+\t\tdcsr-rcpm at 222000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-rcpm\";\n",
"+\t\t\treg = <0x222000 0x1000 0x223000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-ccp\@225000 {\n",
+ "+\t\tdcsr-ccp at 225000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-ccp\";\n",
"+\t\t\treg = <0x225000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-fusectrl\@226000 {\n",
+ "+\t\tdcsr-fusectrl at 226000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-fusectrl\";\n",
"+\t\t\treg = <0x226000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-dap\@300000 {\n",
+ "+\t\tdcsr-dap at 300000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-dap\";\n",
"+\t\t\treg = <0x300000 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-cstf\@350000 {\n",
+ "+\t\tdcsr-cstf at 350000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-cstf\";\n",
"+\t\t\treg = <0x350000 0x1000 0x3a7000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-a7rom\@360000 {\n",
+ "+\t\tdcsr-a7rom at 360000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-a7rom\";\n",
"+\t\t\treg = <0x360000 0x10000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-a7cpu\@370000 {\n",
+ "+\t\tdcsr-a7cpu at 370000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-a7cpu\";\n",
"+\t\t\treg = <0x370000 0x8000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-a7cti\@378000 {\n",
+ "+\t\tdcsr-a7cti at 378000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-a7cti\";\n",
"+\t\t\treg = <0x378000 0x4000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-etm\@37c000 {\n",
+ "+\t\tdcsr-etm at 37c000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-etm\";\n",
"+\t\t\treg = <0x37c000 0x1000 0x37d000 0x3000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-hugorom\@3a0000 {\n",
+ "+\t\tdcsr-hugorom at 3a0000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-hugorom\";\n",
"+\t\t\treg = <0x3a0000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-etf\@3a1000 {\n",
+ "+\t\tdcsr-etf at 3a1000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-etf\";\n",
"+\t\t\treg = <0x3a1000 0x1000 0x3a2000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-etr\@3a3000 {\n",
+ "+\t\tdcsr-etr at 3a3000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-etr\";\n",
"+\t\t\treg = <0x3a3000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-cti\@3a4000 {\n",
+ "+\t\tdcsr-cti at 3a4000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-cti\";\n",
"+\t\t\treg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-atbrepl\@3a8000 {\n",
+ "+\t\tdcsr-atbrepl at 3a8000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-atbrepl\";\n",
"+\t\t\treg = <0x3a8000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-tsgen-ctrl\@3a9000 {\n",
+ "+\t\tdcsr-tsgen-ctrl at 3a9000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-tsgen-ctrl\";\n",
"+\t\t\treg = <0x3a9000 0x1000>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tdcsr-tsgen-read\@3aa000 {\n",
+ "+\t\tdcsr-tsgen-read at 3aa000 {\n",
"+\t\t\tcompatible = \"fsl,ls1021a-dcsr-tsgen-read\";\n",
"+\t\t\treg = <0x3aa000 0x1000>;\n",
"+\t\t};\n",
"+\t};\n",
"+};\n",
"-- \n",
- "1.8.0\n",
- "\n",
- "--\n",
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n",
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org\n",
- "More majordomo info at http://vger.kernel.org/majordomo-info.html"
+ "1.8.0"
]
-6154a48d487275a90dad670eecd34b4f0a88d32b4ed871d7bf794ba749808c35
+c8279e35c021ed3fade19c3bec74bfad5893ab1a510d6e5dee47426d8abb4d8a
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